| Message ID | 20110916170124.16838.70890.stgit@ginnungagap.bsc.es |
|---|---|
| State | New |
| Headers | show |
On 2011-09-16 19:01, Lluís Vilanova wrote:
> Mimics the already-existing "qemu_init_vcpu".
Bad name as it implies something important happens inside. Call it
trace_reset_vcpu because that is what it will do.
Jan
Jan Kiszka writes: > On 2011-09-16 19:01, Lluís Vilanova wrote: >> Mimics the already-existing "qemu_init_vcpu". > Bad name as it implies something important happens inside. Call it > trace_reset_vcpu because that is what it will do. I just thought it is much cleaner to call a generic "qemu_reset_vcpu" function that _might_ do something related to resetting the vCPU state, regardless of whether there is a tracing event for it or not. Otherwise if someone wants to add some generic vCPU-resetting code in the future, the tracing function might end up in the target-specific code instead of the generic qemu code. If you still think this is a bad idea I'll resend a patch with both events renamed into trace_vcpu_init/trace_vcpu_reset. Thanks, Lluis
diff --git a/qemu-common.h b/qemu-common.h index 404c421..d848f4a 100644 --- a/qemu-common.h +++ b/qemu-common.h @@ -302,6 +302,8 @@ struct qemu_work_item { void qemu_init_vcpu(void *env); #endif +#define qemu_reset_vcpu(env) do { } while (0) + typedef struct QEMUIOVector { struct iovec *iov; int niov; diff --git a/target-arm/helper.c b/target-arm/helper.c index d3a3ba2..1bc96e4 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -321,6 +321,8 @@ void cpu_reset(CPUARMState *env) set_float_detect_tininess(float_tininess_before_rounding, &env->vfp.standard_fp_status); tlb_flush(env, 1); + + qemu_reset_vcpu(env); } static int vfp_gdb_get_reg(CPUState *env, uint8_t *buf, int reg) diff --git a/target-cris/translate.c b/target-cris/translate.c index 70abf8a..95c28d9 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3601,6 +3601,8 @@ void cpu_reset (CPUCRISState *env) cris_mmu_init(env); env->pregs[PR_CCS] = 0; #endif + + qemu_reset_vcpu(env); } void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) diff --git a/target-i386/helper.c b/target-i386/helper.c index 5df40d4..4ed179d 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -104,6 +104,8 @@ void cpu_reset(CPUX86State *env) env->dr[7] = DR7_FIXED_1; cpu_breakpoint_remove_all(env, BP_CPU); cpu_watchpoint_remove_all(env, BP_CPU); + + qemu_reset_vcpu(env); } void cpu_x86_close(CPUX86State *env) diff --git a/target-lm32/helper.c b/target-lm32/helper.c index 014fd8d..627c464 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -250,5 +250,7 @@ void cpu_reset(CPUState *env) /* reset cpu state */ memset(env, 0, offsetof(CPULM32State, breakpoints)); + + qemu_reset_vcpu(env); } diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 123e1d9..f2ce52a 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -165,6 +165,8 @@ void cpu_reset(CPUM68KState *env) /* TODO: We should set PC from the interrupt vector. */ env->pc = 0; tlb_flush(env, 1); + + qemu_reset_vcpu(env); } CPUM68KState *cpu_m68k_init(const char *cpu_model) diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index 366fd3e..649486f 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1943,6 +1943,8 @@ void cpu_reset (CPUState *env) env->mmu.c_mmu_tlb_access = 3; env->mmu.c_mmu_zones = 16; #endif + + qemu_reset_vcpu(env); } void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) diff --git a/target-mips/translate.c b/target-mips/translate.c index d5b1c76..480791d 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -12846,6 +12846,8 @@ void cpu_reset (CPUMIPSState *env) } #endif env->exception_index = EXCP_NONE; + + qemu_reset_vcpu(env); } void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 96ea464..7f92671 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -3084,6 +3084,8 @@ void cpu_reset(CPUPPCState *env) env->error_code = 0; /* Flush all TLBs */ tlb_flush(env, 1); + + qemu_reset_vcpu(env); } CPUPPCState *cpu_ppc_init (const char *cpu_model) diff --git a/target-s390x/helper.c b/target-s390x/helper.c index 96dd867..5bc24ab 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -131,6 +131,8 @@ void cpu_reset(CPUS390XState *env) memset(env, 0, offsetof(CPUS390XState, breakpoints)); /* FIXME: reset vector? */ tlb_flush(env, 1); + + qemu_reset_vcpu(env); } #ifndef CONFIG_USER_ONLY diff --git a/target-sh4/translate.c b/target-sh4/translate.c index bad3577..88f0eec 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -205,6 +205,8 @@ void cpu_reset(CPUSH4State * env) set_flush_to_zero(1, &env->fp_status); #endif set_default_nan_mode(1, &env->fp_status); + + qemu_reset_vcpu(env); } typedef struct { diff --git a/target-sparc/helper.c b/target-sparc/helper.c index c80531a..7601969 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -1166,6 +1166,8 @@ void cpu_reset(CPUSPARCState *env) env->npc = env->pc + 4; #endif env->cache_control = 0; + + qemu_reset_vcpu(env); } static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model)
Mimics the already-existing "qemu_init_vcpu". Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> --- qemu-common.h | 2 ++ target-arm/helper.c | 2 ++ target-cris/translate.c | 2 ++ target-i386/helper.c | 2 ++ target-lm32/helper.c | 2 ++ target-m68k/helper.c | 2 ++ target-microblaze/translate.c | 2 ++ target-mips/translate.c | 2 ++ target-ppc/helper.c | 2 ++ target-s390x/helper.c | 2 ++ target-sh4/translate.c | 2 ++ target-sparc/helper.c | 2 ++ 12 files changed, 24 insertions(+), 0 deletions(-)