From patchwork Tue Aug 20 09:18:44 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilya Leoshkevich X-Patchwork-Id: 1149947 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-507338-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ctOLM30g"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46CQJD6XKjz9s4Y for ; Tue, 20 Aug 2019 19:20:44 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; q=dns; s=default; b=dVjqc oCjT9MpYDUH9b8BGkNptijBp0cL1WFV23sMvhVMWqXQ7ReV3cPaQ4oinsXrdXxj6 IIWQuCiuWdYHMd0xIbuHOcdP3ega73nHLwf+v9oXa8fm/IcnlbPVpZ+fkO2jo25t CEI8c47+OL8KdaC23c57PstktRs/raO5BvbUxU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:in-reply-to:references:mime-version :content-transfer-encoding:message-id; s=default; bh=yN7vPut1qNQ nvsYd46apTV8xMAQ=; b=ctOLM30gTA0dR0/y4rCBJdxEvYUxJ6tDfkdWMDBNK/h ePVt816DR3vAalayKPmNF+/+AJEfLZIU6vuRhU7t2gSGxk3psdhBMzmnql9m5NJB vk6MACsA/65O3M/IglhOAVF+i12AWxMEqbf7hfypLfgb4neZSHlfOjBUkxAbts1o = Received: (qmail 31778 invoked by alias); 20 Aug 2019 09:20:22 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 31717 invoked by uid 89); 20 Aug 2019 09:20:22 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-23.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.1 spammy=1098 X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.158.5) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 20 Aug 2019 09:20:15 +0000 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x7K98UsJ158419 for ; Tue, 20 Aug 2019 05:20:13 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0b-001b2d01.pphosted.com with ESMTP id 2ugc13w8w7-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Tue, 20 Aug 2019 05:20:12 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Tue, 20 Aug 2019 10:20:04 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x7K9Jg7D22413738 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Tue, 20 Aug 2019 09:19:42 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF01EA4040; Tue, 20 Aug 2019 09:20:02 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7E04CA404D; Tue, 20 Aug 2019 09:20:02 +0000 (GMT) Received: from white.boeblingen.de.ibm.com (unknown [9.152.97.160]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Tue, 20 Aug 2019 09:20:02 +0000 (GMT) From: Ilya Leoshkevich To: gcc-patches@gcc.gnu.org Cc: Ilya Leoshkevich Subject: [PATCH 7/8] S/390: Use signaling FP comparison instructions Date: Tue, 20 Aug 2019 11:18:44 +0200 In-Reply-To: <20190820091845.80750-1-iii@linux.ibm.com> References: <20190820091845.80750-1-iii@linux.ibm.com> MIME-Version: 1.0 x-cbid: 19082009-0020-0000-0000-00000361A226 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19082009-0021-0000-0000-000021B6D206 Message-Id: <20190820091845.80750-8-iii@linux.ibm.com> X-IsSubscribed: yes dg-torture.exp=inf-compare-1.c is failing, because (qNaN > +Inf) comparison is compiled to CDB instruction, which does not signal an invalid operation exception. KDB should have been used instead. This patch introduces a new CCmode and a new pattern in order to generate signaling instructions in this and similar cases. gcc/ChangeLog: 2019-08-09 Ilya Leoshkevich * config/s390/2827.md: Add new opcodes. * config/s390/2964.md: Likewise. * config/s390/3906.md: Likewise. * config/s390/8561.md: Likewise. * config/s390/s390-builtins.def (s390_vfchesb): Use the new vec_cmpgev4sf_quiet_nocc. (s390_vfchedb): Use the new vec_cmpgev2df_quiet_nocc. (s390_vfchsb): Use the new vec_cmpgtv4sf_quiet_nocc. (s390_vfchdb): Use the new vec_cmpgtv2df_quiet_nocc. (vec_cmplev4sf): Use the new vec_cmplev4sf_quiet_nocc. (vec_cmplev2df): Use the new vec_cmplev2df_quiet_nocc. (vec_cmpltv4sf): Use the new vec_cmpltv4sf_quiet_nocc. (vec_cmpltv2df): Use the new vec_cmpltv2df_quiet_nocc. * config/s390/s390-modes.def (CCSFPS): New mode. * config/s390/s390.c (s390_match_ccmode_set): Support CCSFPS. (s390_select_ccmode): Return CCSFPS for LT, LE, GT, GE and LTGT. (s390_branch_condition_mask): Reuse CCS for CCSFPS. (s390_expand_vec_compare): Use non-signaling patterns where necessary. (s390_reverse_condition): Support CCSFPS. * config/s390/s390.md (*cmp_ccsfps): New pattern. * config/s390/vector.md: (VFCMP_HW_OP): Remove. (asm_fcmp_op): Likewise. (*smaxv2df3_vx): Use pattern for quiet comparison. (*sminv2df3_vx): Likewise. (*vec_cmp_nocc): Remove. (*vec_cmpeq_quiet_nocc): New pattern. (vec_cmpgt_quiet_nocc): Likewise. (vec_cmplt_quiet_nocc): New expander. (vec_cmpge_quiet_nocc): New pattern. (vec_cmple_quiet_nocc): New expander. (*vec_cmpeq_signaling_nocc): New pattern. (*vec_cmpgt_signaling_nocc): Likewise. (*vec_cmpgt_signaling_finite_nocc): Likewise. (*vec_cmpge_signaling_nocc): Likewise. (*vec_cmpge_signaling_finite_nocc): Likewise. (vec_cmpungt): New expander. (vec_cmpunge): Likewise. (vec_cmpuneq): Use quiet patterns. (vec_cmpltgt): Allow only on z14+. (vec_cmpordered): Use quiet patterns. (vec_cmpunordered): Likewise. (VEC_CODE_WITH_COMPLEX_EXPAND): Add ungt and unge. gcc/testsuite/ChangeLog: 2019-08-09 Ilya Leoshkevich * gcc.target/s390/vector/vec-scalar-cmp-1.c: Adjust expectations. --- gcc/config/s390/2827.md | 14 +- gcc/config/s390/2964.md | 13 +- gcc/config/s390/3906.md | 17 +- gcc/config/s390/8561.md | 19 +- gcc/config/s390/s390-builtins.def | 16 +- gcc/config/s390/s390-modes.def | 8 + gcc/config/s390/s390.c | 34 ++-- gcc/config/s390/s390.md | 14 ++ gcc/config/s390/vector.md | 171 +++++++++++++++--- .../gcc.target/s390/vector/vec-scalar-cmp-1.c | 8 +- 10 files changed, 240 insertions(+), 74 deletions(-) diff --git a/gcc/config/s390/2827.md b/gcc/config/s390/2827.md index 3f63f82284d..aafe8e27339 100644 --- a/gcc/config/s390/2827.md +++ b/gcc/config/s390/2827.md @@ -44,7 +44,7 @@ (define_insn_reservation "zEC12_normal_fp" 8 (and (eq_attr "cpu" "zEC12") - (eq_attr "mnemonic" "lnebr,sdbr,sebr,clfxtr,adbr,aebr,celfbr,clfebr,lpebr,msebr,lndbr,clfdbr,cebr,maebr,ltebr,clfdtr,cdlgbr,cxlftr,lpdbr,cdfbr,lcebr,clfxbr,msdbr,cdbr,madbr,meebr,clgxbr,clgdtr,ledbr,cegbr,cdlftr,cdlgtr,mdbr,clgebr,ltdbr,cdlfbr,cdgbr,clgxtr,lcdbr,celgbr,clgdbr,ldebr,cefbr,fidtr,fixtr,madb,msdb,mseb,fiebra,fidbra,aeb,mdb,seb,cdb,tcdb,sdb,adb,tceb,maeb,ceb,meeb,ldeb")) "nothing") + (eq_attr "mnemonic" "lnebr,sdbr,sebr,clfxtr,adbr,aebr,celfbr,clfebr,lpebr,msebr,lndbr,clfdbr,cebr,maebr,ltebr,clfdtr,cdlgbr,cxlftr,lpdbr,cdfbr,lcebr,clfxbr,msdbr,cdbr,madbr,meebr,clgxbr,clgdtr,ledbr,cegbr,cdlftr,cdlgtr,mdbr,clgebr,ltdbr,cdlfbr,cdgbr,clgxtr,lcdbr,celgbr,clgdbr,ldebr,cefbr,fidtr,fixtr,madb,msdb,mseb,fiebra,fidbra,aeb,mdb,seb,cdb,tcdb,sdb,adb,tceb,maeb,ceb,meeb,ldeb,keb,kebr,kdb,kdbr")) "nothing") (define_insn_reservation "zEC12_cgdbr" 2 (and (eq_attr "cpu" "zEC12") @@ -426,6 +426,10 @@ (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cxbr")) "nothing") +(define_insn_reservation "zEC12_kxbr" 18 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kxbr")) "nothing") + (define_insn_reservation "zEC12_ddbr" 36 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "ddbr")) "nothing") @@ -578,10 +582,18 @@ (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cdtr")) "nothing") +(define_insn_reservation "zEC12_kdtr" 11 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kdtr")) "nothing") + (define_insn_reservation "zEC12_cxtr" 14 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "cxtr")) "nothing") +(define_insn_reservation "zEC12_kxtr" 14 + (and (eq_attr "cpu" "zEC12") + (eq_attr "mnemonic" "kxtr")) "nothing") + (define_insn_reservation "zEC12_slbg" 3 (and (eq_attr "cpu" "zEC12") (eq_attr "mnemonic" "slbg")) "nothing") diff --git a/gcc/config/s390/2964.md b/gcc/config/s390/2964.md index a7897bcf58a..4396e3ba1c0 100644 --- a/gcc/config/s390/2964.md +++ b/gcc/config/s390/2964.md @@ -69,7 +69,7 @@ ng,ni,niy,ntstg,ny,o,og,oi,oiy,oy,s,sar,sdb,seb,sfpc,sg,sgf,sh,shy,sl,\ slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,stey,stg,stgrl,\ sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,tabort,tm,tmy,vl,\ vlbb,vleb,vlef,vleg,vleh,vll,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,\ -vlrepf,vlrepg,vlreph,vst,vstl,x,xg,xi,xiy,xy") +vlrepf,vlrepg,vlreph,vst,vstl,x,xg,xi,xiy,xy,kdb") (const_int 1)] (const_int 0))) (define_attr "z13_unit_vfu" "" @@ -109,7 +109,8 @@ vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,wcdgb,wcdlgb,wcgdb,wclgdb,wfadb,\ wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexbs,wfchdb,wfchedb,wfchesb,wfchexb,\ wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfisb,wfixb,wflcdb,wflcsb,wflcxb,wflld,\ wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmadb,wfmasb,wfmaxb,wfmdb,wfmsb,\ -wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb") +wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb,kebr,kdb,kdbr,kxbr,\ +kdtr,kxtr,wfkdb,wfksb") (const_int 1)] (const_int 0))) (define_attr "z13_cracked" "" @@ -131,7 +132,7 @@ stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,ml,mlg,\ mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,sfpc,slb,slbg,slbgr,slbr,\ -sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "z13_endgroup" "" @@ -198,7 +199,7 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlvgp,\ vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,vslb,vsrab,vsrlb,wfcdb,wfcexbs,\ -wfchexbs,wfchxbs,wfcsb")) "nothing") +wfchexbs,wfchxbs,wfcsb,kebr,kdb,kdbr,wfkdb,wfksb")) "nothing") (define_insn_reservation "z13_3" 3 (and (eq_attr "cpu" "z13") @@ -232,7 +233,7 @@ wfmdb,wfmsb,wfmsdb,wfmssb,wfmsxb,wfmxb,wfsdb,wfssb,wfsxb,wldeb,wledb")) "nothing (and (eq_attr "cpu" "z13") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,msg,msgr,sdtr,tdcdt,tdcet,\ vcdgb,vcdlgb,vcgdb,vclgdb,vfadb,vfasb,vfidb,vfisb,vfmadb,vfmasb,vfmdb,vfmsb,\ -vfmsdb,vfmssb,vfsdb,vfssb,vldeb,vledb")) "nothing") +vfmsdb,vfmssb,vfsdb,vfssb,vldeb,vledb,kdtr")) "nothing") (define_insn_reservation "z13_8" 8 (and (eq_attr "cpu" "z13") @@ -254,7 +255,7 @@ celgbr,flogr,m,madb,maeb,maebr,mfy,ml,mlr,mr,msdb,mseb,msebr")) "nothing") (define_insn_reservation "z13_12" 12 (and (eq_attr "cpu" "z13") (eq_attr "mnemonic" "cfdbr,cfebr,cgdbr,cgebr,clfdbr,clfebr,clgdbr,\ -clgebr,cxbr,cxtr,mlg,mlgr,tcxb,tdcxt")) "nothing") +clgebr,cxbr,cxtr,mlg,mlgr,tcxb,tdcxt,kxbr,kxtr")) "nothing") (define_insn_reservation "z13_13" 13 (and (eq_attr "cpu" "z13") diff --git a/gcc/config/s390/3906.md b/gcc/config/s390/3906.md index 8cb4565ee22..1212d8b61f1 100644 --- a/gcc/config/s390/3906.md +++ b/gcc/config/s390/3906.md @@ -71,7 +71,7 @@ sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,stc,stcy,std,stdy,ste,\ stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,strvg,strvh,sty,sy,\ tabort,tm,tmy,vl,vlbb,vleb,vlef,vleg,vleh,vll,vllezb,vllezf,vllezg,vllezh,\ vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr,vst,vstl,vstrl,vstrlr,x,xg,xi,\ -xiy,xy") +xiy,xy,kdb") (const_int 1)] (const_int 0))) (define_attr "z14_unit_vfu" "" @@ -113,7 +113,8 @@ wfadb,wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexbs,wfchdb,wfchedb,wfchesb,\ wfchexb,wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfisb,wfixb,wflcdb,wflcsb,wflcxb,\ wflld,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmadb,wfmasb,wfmaxb,\ wfmaxxb,wfmdb,wfminxb,wfmsb,wfmsdb,wfmssb,wfmsxb,wfmxb,wfnmaxb,wfnmsxb,wfsdb,\ -wfssb,wfsxb,wldeb,wledb") +wfssb,wfsxb,wldeb,wledb,kebr,kdb,kdbr,kxbr,kdtr,kxtr,wfkdb,wfksb,vfkesb,\ +vfkedb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb") (const_int 1)] (const_int 0))) (define_attr "z14_cracked" "" @@ -135,7 +136,7 @@ stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\ ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,oc,ppa,sfpc,slb,slbg,\ -slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "z14_endgroup" "" @@ -192,7 +193,8 @@ vrepig,vrepih,vsb,vsbiq,vscbib,vscbif,vscbig,vscbih,vscbiq,vsegb,vsegf,vsegh,\ vsel,vsf,vsg,vsh,vsl,vslb,vsldb,vsq,vsra,vsrab,vsrl,vsrlb,vuphb,vuphf,\ vuphh,vuplb,vuplf,vuplhb,vuplhf,vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,\ wfcedb,wfcesb,wfchdb,wfchedb,wfchesb,wfchexb,wfchsb,wfchxb,wflcdb,wflcsb,\ -wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,xiy")) "nothing") +wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,xiy,\ +vfkesb,vfkedb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb")) "nothing") (define_insn_reservation "z14_2" 2 (and (eq_attr "cpu" "z14") @@ -204,7 +206,7 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vlgvf,vlgvg,vlgvh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,\ vlrepg,vlreph,vlrl,vlvgp,vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,wfcdb,\ -wfcexbs,wfchexbs,wfchxbs,wfcsb")) "nothing") +wfcexbs,wfchexbs,wfchxbs,wfcsb,kebr,kdb,kdbr,wfkdb,wfksb")) "nothing") (define_insn_reservation "z14_3" 3 (and (eq_attr "cpu" "z14") @@ -238,7 +240,8 @@ wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing") (define_insn_reservation "z14_7" 7 (and (eq_attr "cpu" "z14") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,msgrkc,sdtr,tdcdt,tdcet,\ -vfasb,vfisb,vfmasb,vfmsb,vfmssb,vfnmssb,vfssb,vgef,vgeg,wflld")) "nothing") +vfasb,vfisb,vfmasb,vfmsb,vfmssb,vfnmssb,vfssb,vgef,vgeg,wflld,kdtr")) +"nothing") (define_insn_reservation "z14_8" 8 (and (eq_attr "cpu" "z14") @@ -261,7 +264,7 @@ celgbr,madb,maeb,maebr,msdb,mseb,msebr,vscef,vsceg")) "nothing") (define_insn_reservation "z14_12" 12 (and (eq_attr "cpu" "z14") (eq_attr "mnemonic" "cfdbr,cfebr,cgdbr,cgebr,clfdbr,clfebr,clgdbr,\ -clgebr,cxbr,cxtr,tcxb,tdcxt")) "nothing") +clgebr,cxbr,cxtr,tcxb,tdcxt,kxbr,kxtr")) "nothing") (define_insn_reservation "z14_13" 13 (and (eq_attr "cpu" "z14") diff --git a/gcc/config/s390/8561.md b/gcc/config/s390/8561.md index e5a345f4dba..91a92b6bc5c 100644 --- a/gcc/config/s390/8561.md +++ b/gcc/config/s390/8561.md @@ -70,7 +70,7 @@ sar,sdb,seb,sfpc,sg,sgf,sgh,sh,shy,sl,slb,slbg,slg,slgf,sly,sqdb,sqeb,st,\ stc,stcy,std,stdy,ste,stey,stg,stgrl,sth,sthrl,sthy,stoc,stocg,strl,strv,\ strvg,strvh,sty,sy,tabort,tm,tmy,vl,vlbb,vleb,vlef,vleg,vleh,vll,vllezb,\ vllezf,vllezg,vllezh,vllezlf,vlrepb,vlrepf,vlrepg,vlreph,vlrl,vlrlr,vst,\ -vstef,vsteg,vstl,vstrl,vstrlr,x,xg,xi,xiy,xy") +vstef,vsteg,vstl,vstrl,vstrlr,x,xg,xi,xiy,xy,keb,kdb") (const_int 1)] (const_int 0))) (define_attr "arch13_unit_vfu" "" @@ -112,7 +112,9 @@ vupllf,vupllh,vx,vzero,wfadb,wfasb,wfaxb,wfcdb,wfcedb,wfcesb,wfcexb,wfcexbs,\ wfchdb,wfchedb,wfchesb,wfchexb,wfchexbs,wfchsb,wfchxb,wfchxbs,wfcsb,wfidb,\ wfisb,wfixb,wflcdb,wflcsb,wflcxb,wflld,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,\ wflpxb,wfmadb,wfmasb,wfmaxb,wfmaxxb,wfmdb,wfminxb,wfmsb,wfmsdb,wfmssb,wfmsxb,\ -wfmxb,wfnmaxb,wfnmsxb,wfsdb,wfssb,wfsxb,wldeb,wledb") +wfmxb,wfnmaxb,wfnmsxb,wfsdb,wfssb,wfsxb,wldeb,wledb,keb,kebr,kdb,kdbr,kxbr,\ +kdtr,kxtr,wfkdb,wfksb,vfkesb,vfkedb,wfkexb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,\ +vfkhedb,wfkhexb") (const_int 1)] (const_int 0))) (define_attr "arch13_cracked" "" @@ -134,7 +136,7 @@ stam,stm,stmg,stmy,tbegin,tbeginc") cxtr,dlgr,dlr,dr,dsgfr,dsgr,dxbr,dxtr,fixbr,fixbra,fixtr,flogr,lcxbr,lnxbr,\ lpxbr,ltxbr,ltxtr,lxdb,lxdbr,lxdtr,lxeb,lxebr,m,madb,maeb,maebr,mfy,mg,mgrk,\ ml,mlg,mlgr,mlr,mr,msdb,mseb,msebr,mvc,mxbr,mxtr,nc,oc,ppa,sfpc,slb,slbg,\ -slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc") +slbgr,slbr,sqxbr,sxbr,sxtr,tabort,tcxb,tdcxt,tend,xc,kxbr,kxtr") (const_int 1)] (const_int 0))) (define_attr "arch13_endgroup" "" @@ -194,7 +196,8 @@ vsel,vsf,vsg,vsh,vsl,vslb,vsldb,vsq,vsra,vsrab,vsrl,vsrlb,vuphb,vuphf,\ vuphh,vuplb,vuplf,vuplhb,vuplhf,vuplhh,vuplhw,vupllb,vupllf,vupllh,vx,vzero,\ wfcedb,wfcesb,wfcexb,wfchdb,wfchedb,wfchesb,wfchexb,wfchsb,wfchxb,wflcdb,\ wflcsb,wflcxb,wflndb,wflnsb,wflnxb,wflpdb,wflpsb,wflpxb,wfmaxxb,wfminxb,xi,\ -xiy")) "nothing") +xiy,vfkesb,vfkedb,wfkexb,vfkhsb,vfkhdb,wfkhxb,vfkhesb,vfkhedb,wfkhexb")) +"nothing") (define_insn_reservation "arch13_2" 2 (and (eq_attr "cpu" "arch13") @@ -206,7 +209,8 @@ vchlhs,vfcedbs,vfcesbs,vfchdbs,vfchedbs,vfchesbs,vfchsbs,vfeeb,vfeef,vfeeh,\ vfeneb,vfenef,vfeneh,vfenezb,vfenezf,vfenezh,vftcidb,vftcisb,vistrb,vistrf,\ vistrh,vlgvb,vlgvf,vlgvg,vlgvh,vllezb,vllezf,vllezg,vllezh,vllezlf,vlrepb,\ vlrepf,vlrepg,vlreph,vlrl,vlvgp,vpklsfs,vpklsgs,vpklshs,vpksfs,vpksgs,vpkshs,\ -wfcdb,wfcexbs,wfchexbs,wfchxbs,wfcsb")) "nothing") +wfcdb,wfcexbs,wfchexbs,wfchxbs,wfcsb,keb,kebr,kdb,kdbr,wfkdb,wfksb")) +"nothing") (define_insn_reservation "arch13_3" 3 (and (eq_attr "cpu" "arch13") @@ -240,7 +244,7 @@ wfmasb,wfmdb,wfmsb,wfmsdb,wfmssb,wfsdb,wfssb,wldeb,wledb")) "nothing") (define_insn_reservation "arch13_7" 7 (and (eq_attr "cpu" "arch13") (eq_attr "mnemonic" "adtr,cdtr,fidtr,ldetr,ltdtr,msgrkc,sdtr,tdcdt,\ -tdcet,vgef,vgeg")) "nothing") +tdcet,vgef,vgeg,kdtr")) "nothing") (define_insn_reservation "arch13_8" 8 (and (eq_attr "cpu" "arch13") @@ -263,7 +267,8 @@ clgebr,mg,mgrk,mlg,mlgr")) "nothing") (define_insn_reservation "arch13_12" 12 (and (eq_attr "cpu" "arch13") -(eq_attr "mnemonic" "cxbr,cxftr,cxlftr,cxtr,tcxb,tdcxt")) "nothing") +(eq_attr "mnemonic" "cxbr,cxftr,cxlftr,cxtr,tcxb,tdcxt,kxbr,kxtr")) +"nothing") (define_insn_reservation "arch13_13" 13 (and (eq_attr "cpu" "arch13") diff --git a/gcc/config/s390/s390-builtins.def b/gcc/config/s390/s390-builtins.def index cfc69651b0d..013cac0206a 100644 --- a/gcc/config/s390/s390-builtins.def +++ b/gcc/config/s390/s390-builtins.def @@ -1495,8 +1495,8 @@ B_DEF (vec_cmpgev4si, vec_cmpgev4si, 0, B_DEF (vec_cmpgeuv4si, vec_cmpgeuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmpgev2di, vec_cmpgev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpgeuv2di, vec_cmpgeuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (s390_vfchesb, vec_cmpgev4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (s390_vfchedb, vec_cmpgev2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (s390_vfchesb, vec_cmpgev4sf_quiet_nocc,0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (s390_vfchedb, vec_cmpgev2df_quiet_nocc,0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmpgt, s390_vec_cmpgt_s8, s390_vec_cmpgt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmpgt_s8, s390_vchb, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1518,8 +1518,8 @@ B_DEF (s390_vchf, vec_cmpgtv4si, 0, B_DEF (s390_vchlf, vec_cmpgtuv4si, 0, B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (s390_vchg, vec_cmpgtv2di, 0, B_VX, 0, BT_FN_V2DI_V2DI_V2DI) B_DEF (s390_vchlg, vec_cmpgtuv2di, 0, B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (s390_vfchsb, vec_cmpgtv4sf, 0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (s390_vfchdb, vec_cmpgtv2df, 0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (s390_vfchsb, vec_cmpgtv4sf_quiet_nocc,0, B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (s390_vfchdb, vec_cmpgtv2df_quiet_nocc,0, B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmple, s390_vec_cmple_s8, s390_vec_cmple_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmple_s8, vec_cmplev16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1541,8 +1541,8 @@ B_DEF (vec_cmplev4si, vec_cmplev4si, 0, B_DEF (vec_cmpleuv4si, vec_cmpleuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmplev2di, vec_cmplev2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpleuv2di, vec_cmpleuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmplev4sf, vec_cmplev4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (vec_cmplev2df, vec_cmplev2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (vec_cmplev4sf, vec_cmplev4sf_quiet_nocc,0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmplev2df, vec_cmplev2df_quiet_nocc,0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cmplt, s390_vec_cmplt_s8, s390_vec_cmplt_dbl, B_VX, BT_FN_OV4SI_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cmplt_s8, vec_cmpltv16qi, 0, 0, BT_OV_BV16QI_V16QI_V16QI) @@ -1564,8 +1564,8 @@ B_DEF (vec_cmpltv4si, vec_cmpltv4si, 0, B_DEF (vec_cmpltuv4si, vec_cmpltuv4si, 0, B_INT | B_VX, 0, BT_FN_V4SI_UV4SI_UV4SI) B_DEF (vec_cmpltv2di, vec_cmpltv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) B_DEF (vec_cmpltuv2di, vec_cmpltuv2di, 0, B_INT | B_VX, 0, BT_FN_V2DI_UV2DI_UV2DI) -B_DEF (vec_cmpltv4sf, vec_cmpltv4sf, 0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) -B_DEF (vec_cmpltv2df, vec_cmpltv2df, 0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) +B_DEF (vec_cmpltv4sf, vec_cmpltv4sf_quiet_nocc,0, B_INT | B_VXE, 0, BT_FN_V4SI_V4SF_V4SF) +B_DEF (vec_cmpltv2df, vec_cmpltv2df_quiet_nocc,0, B_INT | B_VX, 0, BT_FN_V2DI_V2DF_V2DF) OB_DEF (s390_vec_cntlz, s390_vec_cntlz_s8, s390_vec_cntlz_u64, B_VX, BT_FN_OV4SI_OV4SI) OB_DEF_VAR (s390_vec_cntlz_s8, s390_vclzb, 0, 0, BT_OV_UV16QI_V16QI) diff --git a/gcc/config/s390/s390-modes.def b/gcc/config/s390/s390-modes.def index 7b7c1141449..2d9cd9b5945 100644 --- a/gcc/config/s390/s390-modes.def +++ b/gcc/config/s390/s390-modes.def @@ -52,6 +52,8 @@ CCS: EQ LT GT UNORDERED (LTGFR, LTGR, LTR, ICM/Y, ADB/R, AEB/R, SDB/R, SEB/R, SRAG, SRA, SRDA) CCSR: EQ GT LT UNORDERED (CGF/R, CH/Y) +CCSFPS: EQ GT LT UNORDERED (KEB/R, KDB/R, KXBR, KDTR, + KXTR, WFK) Condition codes resulting from add with overflow @@ -140,6 +142,11 @@ around. The following both modes can be considered as CCS and CCU modes with exchanged operands. +CCSFPS + +This mode is used for signaling rtxes: LT, LE, GT, GE and LTGT. + + CCL1, CCL2 These modes represent the result of overflow checks. @@ -226,6 +233,7 @@ CC_MODE (CCU); CC_MODE (CCUR); CC_MODE (CCS); CC_MODE (CCSR); +CC_MODE (CCSFPS); CC_MODE (CCT); CC_MODE (CCT1); CC_MODE (CCT2); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index afd81cdc24b..26c81fa0c70 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -1376,6 +1376,7 @@ s390_match_ccmode_set (rtx set, machine_mode req_mode) case E_CCZ1mode: case E_CCSmode: case E_CCSRmode: + case E_CCSFPSmode: case E_CCUmode: case E_CCURmode: case E_CCOmode: @@ -1559,6 +1560,12 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) else return CCAPmode; } + + /* Fall through. */ + case LTGT: + if (HONOR_NANS (op0) || HONOR_NANS (op1)) + return CCSFPSmode; + /* Fall through. */ case UNORDERED: case ORDERED: @@ -1567,7 +1574,6 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) case UNLT: case UNGE: case UNGT: - case LTGT: if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND) && GET_CODE (op1) != CONST_INT) return CCSRmode; @@ -2082,6 +2088,7 @@ s390_branch_condition_mask (rtx code) break; case E_CCSmode: + case E_CCSFPSmode: switch (GET_CODE (code)) { case EQ: return CC0; @@ -6504,18 +6511,23 @@ s390_expand_vec_compare (rtx target, enum rtx_code cond, { /* NE a != b -> !(a == b) */ case NE: cond = EQ; neg_p = true; break; - /* UNGT a u> b -> !(b >= a) */ - case UNGT: cond = GE; neg_p = true; swap_p = true; break; - /* UNGE a u>= b -> !(b > a) */ - case UNGE: cond = GT; neg_p = true; swap_p = true; break; - /* LE: a <= b -> b >= a */ + case UNGT: + emit_insn (gen_vec_cmpungt (target, cmp_op1, cmp_op2)); + return; + case UNGE: + emit_insn (gen_vec_cmpunge (target, cmp_op1, cmp_op2)); + return; case LE: cond = GE; swap_p = true; break; - /* UNLE: a u<= b -> !(a > b) */ - case UNLE: cond = GT; neg_p = true; break; + /* UNLE: (a u<= b) -> (b u>= a). */ + case UNLE: + emit_insn (gen_vec_cmpunge (target, cmp_op2, cmp_op1)); + return; /* LT: a < b -> b > a */ case LT: cond = GT; swap_p = true; break; - /* UNLT: a u< b -> !(a >= b) */ - case UNLT: cond = GE; neg_p = true; break; + /* UNLT: (a u< b) -> (b u> a). */ + case UNLT: + emit_insn (gen_vec_cmpungt (target, cmp_op2, cmp_op1)); + return; case UNEQ: emit_insn (gen_vec_cmpuneq (target, cmp_op1, cmp_op2)); return; @@ -6678,7 +6690,7 @@ s390_reverse_condition (machine_mode mode, enum rtx_code code) { /* Reversal of FP compares takes care -- an ordered compare becomes an unordered compare and vice versa. */ - if (mode == CCVFALLmode || mode == CCVFANYmode) + if (mode == CCVFALLmode || mode == CCVFANYmode || mode == CCSFPSmode) return reverse_condition_maybe_unordered (code); else if (mode == CCVIALLmode || mode == CCVIANYmode) return reverse_condition (code); diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index e4516f6c378..bf3e051dbae 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -1424,6 +1424,20 @@ (set_attr "cpu_facility" "*,*,vx,vxe") (set_attr "enabled" "*,,,")]) +(define_insn "*cmp_ccsfps" + [(set (reg CC_REGNUM) + (compare (match_operand:FP 0 "register_operand" "f,f,v,v") + (match_operand:FP 1 "general_operand" "f,R,v,v")))] + "s390_match_ccmode (insn, CCSFPSmode) && TARGET_HARD_FLOAT" + "@ + kr\t%0,%1 + kb\t%0,%1 + wfkdb\t%0,%1 + wfksb\t%0,%1" + [(set_attr "op_type" "RRE,RXE,VRR,VRR") + (set_attr "cpu_facility" "*,*,vx,vxe") + (set_attr "enabled" "*,,,")]) + ; Compare and Branch instructions ; cij, cgij, crj, cgrj, cfi, cgfi, cr, cgr diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md index 43a913bbf27..1af7b503a82 100644 --- a/gcc/config/s390/vector.md +++ b/gcc/config/s390/vector.md @@ -168,10 +168,6 @@ (define_mode_attr vec_halfnumelts [(V4SF "V2SF") (V4SI "V2SI")]) -; The comparisons not setting CC iterate over the rtx code. -(define_code_iterator VFCMP_HW_OP [eq gt ge]) -(define_code_attr asm_fcmp_op [(eq "e") (gt "h") (ge "he")]) - ; Comparison operators on int and fp compares which are directly @@ -1372,7 +1368,8 @@ "#" "&& 1" [(set (match_dup 3) - (gt:V2DI (match_dup 1) (match_dup 2))) + (not:V2DI + (unge:V2DI (match_dup 2) (match_dup 1)))) (set (match_dup 0) (if_then_else:V2DF (eq (match_dup 3) (match_dup 4)) @@ -1407,7 +1404,8 @@ "#" "&& 1" [(set (match_dup 3) - (gt:V2DI (match_dup 1) (match_dup 2))) + (not:V2DI + (unge:V2DI (match_dup 2) (match_dup 1)))) (set (match_dup 0) (if_then_else:V2DF (eq (match_dup 3) (match_dup 4)) @@ -1461,27 +1459,134 @@ ;; Floating point compares ;; -; EQ, GT, GE -; vfcesb, vfcedb, wfcexb, vfchsb, vfchdb, wfchxb, vfchesb, vfchedb, wfchexb -(define_insn "*vec_cmp_nocc" - [(set (match_operand: 0 "register_operand" "=v") - (VFCMP_HW_OP: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v")))] - "TARGET_VX" - "fcb\t%v0,%v1,%v2" +; vfcesb, vfcedb, wfcexb: non-signaling "==" comparison (a == b) +(define_insn "*vec_cmpeq_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (eq: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX" + "fceb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfchsb, vfchdb, wfchxb: non-signaling > comparison (!(b u>= a)) +(define_insn "vec_cmpgt_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v"))))] + "TARGET_VX" + "fchb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_expand "vec_cmplt_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v"))))] + "TARGET_VX") + +; vfchesb, vfchedb, wfchexb: non-signaling >= comparison (!(a u< b)) +(define_insn "vec_cmpge_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v"))))] + "TARGET_VX" + "fcheb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_expand "vec_cmple_quiet_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v"))))] + "TARGET_VX") + +; vfkesb, vfkedb, wfkexb: signaling == comparison ((a >= b) & (b >= a)) +(define_insn "*vec_cmpeq_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (and: + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")) + (ge: (match_dup 2) + (match_dup 1))))] + "TARGET_VXE" + "fkeb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfkhsb, vfkhdb, wfkhxb: signaling > comparison (a > b) +(define_insn "*vec_cmpgt_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (gt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VXE" + "fkhb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_insn "*vec_cmpgt_signaling_finite_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (gt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX && !TARGET_VXE && flag_finite_math_only" + "fchb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +; vfkhesb, vfkhedb, wfkhexb: signaling >= comparison (a >= b) +(define_insn "*vec_cmpge_signaling_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VXE" + "fkheb\t%v0,%v1,%v2" + [(set_attr "op_type" "VRR")]) + +(define_insn "*vec_cmpge_signaling_finite_nocc" + [(set (match_operand: 0 "register_operand" "=v") + (ge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))] + "TARGET_VX && !TARGET_VXE && flag_finite_math_only" + "fcheb\t%v0,%v1,%v2" [(set_attr "op_type" "VRR")]) ; Expanders for not directly supported comparisons +; Signaling comparisons must be expressed via signaling rtxes only, +; and quiet comparisons must be expressed via quiet rtxes only. + +; UNGT a u> b -> !!(b u< a) +(define_expand "vec_cmpungt" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 2 "register_operand" "v") + (match_operand:VFT 1 "register_operand" "v")))) + (set (match_dup 0) + (not: (match_dup 0)))] + "TARGET_VX") -; UNEQ a u== b -> !(a > b | b > a) +; UNGE a u>= b -> !!(a u>= b) +(define_expand "vec_cmpunge" + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 0) + (not: (match_dup 0)))] + "TARGET_VX") + +; UNEQ a u== b -> !(!(a u>= b) | !(b u>= a)) (define_expand "vec_cmpuneq" - [(set (match_operand: 0 "register_operand" "=v") - (gt: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) - (gt: (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior: (match_dup 0) (match_dup 3))) - (set (match_dup 0) (not: (match_dup 0)))] + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unge: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 3) + (not: + (unge: (match_dup 2) + (match_dup 1)))) + (set (match_dup 0) + (ior: (match_dup 0) + (match_dup 3))) + (set (match_dup 0) + (not: (match_dup 0)))] "TARGET_VX" { operands[3] = gen_reg_rtx (mode); @@ -1494,18 +1599,24 @@ (match_operand:VFT 2 "register_operand" "v"))) (set (match_dup 3) (gt: (match_dup 2) (match_dup 1))) (set (match_dup 0) (ior: (match_dup 0) (match_dup 3)))] - "TARGET_VX" + "TARGET_VXE" { operands[3] = gen_reg_rtx (mode); }) -; ORDERED (a, b): a >= b | b > a +; ORDERED (a, b): !(a u< b) | !(a u>= b) (define_expand "vec_cmpordered" - [(set (match_operand: 0 "register_operand" "=v") - (ge: (match_operand:VFT 1 "register_operand" "v") - (match_operand:VFT 2 "register_operand" "v"))) - (set (match_dup 3) (gt: (match_dup 2) (match_dup 1))) - (set (match_dup 0) (ior: (match_dup 0) (match_dup 3)))] + [(set (match_operand: 0 "register_operand" "=v") + (not: + (unlt: (match_operand:VFT 1 "register_operand" "v") + (match_operand:VFT 2 "register_operand" "v")))) + (set (match_dup 3) + (not: + (unge: (match_dup 1) + (match_dup 2)))) + (set (match_dup 0) + (ior: (match_dup 0) + (match_dup 3)))] "TARGET_VX" { operands[3] = gen_reg_rtx (mode); @@ -1525,7 +1636,7 @@ }) (define_code_iterator VEC_CODE_WITH_COMPLEX_EXPAND - [uneq ltgt ordered unordered]) + [ungt unge uneq ltgt ordered unordered]) (define_expand "vec_cmp" [(match_operand 0 "register_operand" "") diff --git a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c index ea51d0c86af..073d574aa5e 100644 --- a/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c +++ b/gcc/testsuite/gcc.target/s390/vector/vec-scalar-cmp-1.c @@ -34,7 +34,7 @@ gt (double a, double b) return a > b; } -/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */ +/* { dg-final { scan-assembler "gt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinh\t%r2,0" } } */ int ge (double a, double b) @@ -45,7 +45,7 @@ ge (double a, double b) return a >= b; } -/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */ +/* { dg-final { scan-assembler "ge:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinhe\t%r2,0" } } */ int lt (double a, double b) @@ -56,7 +56,7 @@ lt (double a, double b) return a < b; } -/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */ +/* { dg-final { scan-assembler "lt:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinl\t%r2,0" } } */ int le (double a, double b) @@ -67,4 +67,4 @@ le (double a, double b) return a <= b; } -/* { dg-final { scan-assembler "le:\n\[^:\]*\twfcdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */ +/* { dg-final { scan-assembler "le:\n\[^:\]*\twfkdb\t%v\[0-9\]*,%v\[0-9\]*\n\t\[^:\]+\tlochinle\t%r2,0" } } */