@@ -26,8 +26,13 @@
#define S10_HANDOFF_OFFSET_LENGTH 0x4
#define S10_HANDOFF_OFFSET_DATA 0x10
-#define S10_HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
-#define S10_HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#ifdef TARGET_SOCFPGA_STRATIX10
+#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x608)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x60C)
+#else
+#define HANDOFF_CLOCK_OSC (S10_HANDOFF_BASE + 0x5fc)
+#define HANDOFF_CLOCK_FPGA (S10_HANDOFF_BASE + 0x600)
+#endif
#define S10_HANDOFF_SIZE 4096
@@ -33,7 +33,8 @@ const struct cm_config * const cm_get_default_config(void)
const unsigned int cm_get_osc_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
- u32 clock = readl(S10_HANDOFF_CLOCK_OSC);
+
+ u32 clock = readl(HANDOFF_CLOCK_OSC);
SYSMGR_WRITEL(clock, SYSMGR_BOOT_SCRATCH_COLD1);
#endif
@@ -48,7 +49,7 @@ const unsigned int cm_get_intosc_clk_hz(void)
const unsigned int cm_get_fpga_clk_hz(void)
{
#ifdef CONFIG_SPL_BUILD
- u32 clock = readl(S10_HANDOFF_CLOCK_FPGA);
+ u32 clock = readl(HANDOFF_CLOCK_FPGA);
SYSMGR_WRITEL(clock, SYSMGR_BOOT_SCRATCH_COLD2);
#endif
Add clock handoff offset for Agilex. Remove S10 prefix to avoid confusion. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com> --- arch/arm/mach-socfpga/include/mach/handoff_s10.h | 9 +++++++-- arch/arm/mach-socfpga/wrap_pll_config_s10.c | 5 +++-- 2 files changed, 10 insertions(+), 4 deletions(-)