[GIT,PULL,1/2] SoCFPGA DTS updates for v5.4
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Message ID 20190819141659.26414-1-dinguyen@kernel.org
State New
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  • [GIT,PULL,1/2] SoCFPGA DTS updates for v5.4
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Pull-request

git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.4

Message

Dinh Nguyen Aug. 19, 2019, 2:16 p.m. UTC
Hi Arnd, Kevin, and Olof:

Please pull in these SoCFPGA DTS updates for v5.4.

Thanks,
Dinh

The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:

  Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.4

for you to fetch changes up to d8c1ccac448fd21a3753517a34ee0164c28ac786:

  ARM: dts: socfpga: add missing reset-names for dma (2019-07-30 09:09:31 -0500)

----------------------------------------------------------------
SoCFPGA DTS updates for v5.4
- Add reset properties for various peripherals
	- QSPI OCP and DMA on Arria10
	- DMA on Agilex/Stratix10
- Update NAND controller bindings to match driver update
- Add NAND controller to Stratix10
- VINING FPGA board fixups
	- Update button mapping
	- Adjust GMAC1 clock and TXD skew settings
- Add missing reset-names for dma controller

----------------------------------------------------------------
Dinh Nguyen (5):
      ARM: dts: socfpga: add the QSPI OCP reset property on arria10
      ARM: dts: socfpga: add reset properties for DMA
      arm64: dts: agilex/stratix10: Add reset properties for DMA
      arm64: dts: stratix10: Add NAND device node
      ARM: dts: socfpga: add missing reset-names for dma

Marek Vasut (2):
      ARM: dts: socfpga: Fix up button mapping on VINING FPGA
      ARM: dts: socfpga: Adjust GMAC1 clock and TXD lines skew on VINING FPGA

Masahiro Yamada (1):
      ARM: dts: socfpga: update to new Denali NAND binding

 arch/arm/boot/dts/socfpga.dtsi                     |  3 ++-
 arch/arm/boot/dts/socfpga_arria10.dtsi             |  7 +++--
 arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts   | 20 ++++++++++-----
 arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 30 +++++++++++++++++-----
 arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi  | 18 +++++++++++++
 arch/arm64/boot/dts/intel/socfpga_agilex.dtsi      |  2 ++
 6 files changed, 63 insertions(+), 17 deletions(-)

Comments

Arnd Bergmann Sept. 3, 2019, 1:11 p.m. UTC | #1
On Mon, Aug 19, 2019 at 4:17 PM Dinh Nguyen <dinguyen@kernel.org> wrote:
> SoCFPGA DTS updates for v5.4
> - Add reset properties for various peripherals
>         - QSPI OCP and DMA on Arria10
>         - DMA on Agilex/Stratix10
> - Update NAND controller bindings to match driver update
> - Add NAND controller to Stratix10
> - VINING FPGA board fixups
>         - Update button mapping
>         - Adjust GMAC1 clock and TXD skew settings
> - Add missing reset-names for dma controller
>


Pulled into arm/dt, thanks!

      Arnd