| Message ID | 1316170498-27839-1-git-send-email-sr@denx.de |
|---|---|
| State | Accepted |
| Commit | 226502e01bc7ffa79dde28604075949f8f816cfc |
| Delegated to: | Stefan Roese |
| Headers | show |
On Friday 16 September 2011 12:54:58 Stefan Roese wrote: > Flush the dcache before removing the TLB with caches enabled. > Otherwise this might lead to problems later on, e.g. while booting > Linux (as seen on ICON-440SPe). Applied to u-boot-ppc4xx/master. Best regards, Stefan -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office@denx.de
diff --git a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c index 95df1d9..4a2f337 100644 --- a/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c +++ b/arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c @@ -657,6 +657,13 @@ phys_size_t initdram(int board_type) #endif /* + * Flush the dcache before removing the TLB with caches + * enabled. Otherwise this might lead to problems later on, + * e.g. while booting Linux (as seen on ICON-440SPe). + */ + flush_dcache(); + + /* * Now after initialization (auto-calibration and ECC generation) * remove the TLB entries with caches enabled and program again with * desired cache functionality
Flush the dcache before removing the TLB with caches enabled. Otherwise this might lead to problems later on, e.g. while booting Linux (as seen on ICON-440SPe). Signed-off-by: Stefan Roese <sr@denx.de> --- arch/powerpc/cpu/ppc4xx/44x_spd_ddr2.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-)