From patchwork Fri Aug 16 07:21:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Shih X-Patchwork-Id: 1148003 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 468vtQ5Wb4z9sPQ for ; Fri, 16 Aug 2019 17:23:10 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727109AbfHPHW7 (ORCPT ); Fri, 16 Aug 2019 03:22:59 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:46014 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1727025AbfHPHWv (ORCPT ); Fri, 16 Aug 2019 03:22:51 -0400 X-UUID: 986e9a7c64a6416eaea88be0867cf5d9-20190816 X-UUID: 986e9a7c64a6416eaea88be0867cf5d9-20190816 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0707 with TLS) with ESMTP id 1785444964; Fri, 16 Aug 2019 15:22:42 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 16 Aug 2019 15:22:46 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 16 Aug 2019 15:22:46 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , sam shih Subject: [PATCH v3 9/10] dt-bindings: pwm: update bindings for MT7628 SoC Date: Fri, 16 Aug 2019 15:21:27 +0800 Message-ID: <1565940088-845-10-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1565940088-845-1-git-send-email-sam.shih@mediatek.com> References: <1565940088-845-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org From: sam shih This updates bindings for MT7628 pwm controller. Signed-off-by: Sam Shih --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index c7bd5633d1eb..bfdc438ae4d3 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -21,6 +21,9 @@ Required properties: - pinctrl-0: One property must exist for each entry in pinctrl-names. See pinctrl/pinctrl-bindings.txt for details of the property values. - num-pwms: the number of PWM channels. + Optional properties: + - clock-frequency: fix clock frequency, this is only used in MT7628 SoC + for period calculation. This SoC has no complex clock tree. Example: pwm0: pwm@11006000 {