Message ID | 20190815083716.4715-4-xiaowei.bao@nxp.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
Series | [01/10] PCI: designware-ep: Add multiple PFs support for DWC | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | success | Successfully applied on branch next (da206bd46848568e1aaf35f00e2d78bf9bc94f95) |
snowpatch_ozlabs/checkpatch | success | total: 0 errors, 0 warnings, 0 checks, 11 lines checked |
diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index e20ceaa..16f592e 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -22,7 +22,10 @@ Required properties: "fsl,ls1043a-pcie" "fsl,ls1012a-pcie" EP mode: - "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls-pcie-ep" + "fsl,ls1046a-pcie-ep" + "fsl,ls1088a-pcie-ep" + "fsl,ls2088a-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property.
Add compatible strings for ls1088a and ls2088a. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> --- Documentation/devicetree/bindings/pci/layerscape-pci.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)