From patchwork Tue Aug 13 10:22:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1146179 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-506797-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="kXDl9iDK"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46781J4Yvqz9sN6 for ; Tue, 13 Aug 2019 20:23:00 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=yArOUTa3aFZyAUk/Q4EgUrMbfkans0FVy0Nxulp32tB/NmxuehGKc 1oiUhER3hOk95TktfdSglRbedMKINnwPBcsZGsmxlmlhq7Fp2DH6Y/pl6vslGTGS Q8ZJDxqIeQdqFK3Yilt3rAGDseiDKkOtcnieDAq6Q6YzGF6N9kwbEA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=otf9IjQaIBuUOf5k31I/mWBXHH4=; b=kXDl9iDKEq30mKb6E8sz 8BeKEvFhgPePMjMmE0oj8ApRbyYBT4n/6aD/bk+w9XDwHuGxv2dQIfCaLnwmzjzJ 3A3JIZ5sqyNXlEuE6YRfJof0g96Vu9o38VkiXm/Gjog9oTnug8mDeHk/qLmGSOBW bwaPyK2B92dp+HogJ8CxyuY= Received: (qmail 123714 invoked by alias); 13 Aug 2019 10:22:53 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 123662 invoked by uid 89); 13 Aug 2019 10:22:52 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-8.3 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=ham version=3.3.1 spammy=0n, HX-Languages-Length:5442 X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.110.172) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 13 Aug 2019 10:22:49 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 23432344 for ; Tue, 13 Aug 2019 03:22:48 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.99.62]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BE9D03F694 for ; Tue, 13 Aug 2019 03:22:47 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [committed][AArch64] Use simd_immediate_info for SVE predicate constants Date: Tue, 13 Aug 2019 11:22:46 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.1 (gnu/linux) MIME-Version: 1.0 X-IsSubscribed: yes This patch makes predicate constants use the normal simd_immediate_info machinery, rather than treating PFALSE and PTRUE as special cases. This makes it easier to add other types of predicate constant later. Tested on aarch64-linux-gnu (with and without SVE) and aarch64_be-elf. Applied as r274372. Richard 2019-08-13 Richard Sandiford gcc/ * config/aarch64/aarch64-protos.h (aarch64_output_ptrue): Delete. * config/aarch64/aarch64-sve.md (*aarch64_sve_mov): Use a single Dn alternative instead of separate Dz and Dm alternatives. Use aarch64_output_sve_move_immediate. * config/aarch64/aarch64.c (aarch64_sve_element_int_mode): New function. (aarch64_simd_valid_immediate): Fill in the simd_immediate_info for predicates too. (aarch64_output_sve_mov_immediate): Handle predicate modes. (aarch64_output_ptrue): Delete. Index: gcc/config/aarch64/aarch64-protos.h =================================================================== --- gcc/config/aarch64/aarch64-protos.h 2019-08-08 18:11:22.000000000 +0100 +++ gcc/config/aarch64/aarch64-protos.h 2019-08-13 11:20:41.965713252 +0100 @@ -462,7 +462,6 @@ char *aarch64_output_scalar_simd_mov_imm char *aarch64_output_simd_mov_immediate (rtx, unsigned, enum simd_immediate_check w = AARCH64_CHECK_MOV); char *aarch64_output_sve_mov_immediate (rtx); -char *aarch64_output_ptrue (machine_mode, char); bool aarch64_pad_reg_upward (machine_mode, const_tree, bool); bool aarch64_regno_ok_for_base_p (int, bool); bool aarch64_regno_ok_for_index_p (int, bool); Index: gcc/config/aarch64/aarch64-sve.md =================================================================== --- gcc/config/aarch64/aarch64-sve.md 2019-08-13 10:38:35.963894971 +0100 +++ gcc/config/aarch64/aarch64-sve.md 2019-08-13 11:20:41.965713252 +0100 @@ -453,8 +453,8 @@ (define_expand "mov" ) (define_insn "*aarch64_sve_mov" - [(set (match_operand:PRED_ALL 0 "nonimmediate_operand" "=Upa, m, Upa, Upa, Upa") - (match_operand:PRED_ALL 1 "general_operand" "Upa, Upa, m, Dz, Dm"))] + [(set (match_operand:PRED_ALL 0 "nonimmediate_operand" "=Upa, m, Upa, Upa") + (match_operand:PRED_ALL 1 "general_operand" "Upa, Upa, m, Dn"))] "TARGET_SVE && (register_operand (operands[0], mode) || register_operand (operands[1], mode))" @@ -462,8 +462,7 @@ (define_insn "*aarch64_sve_mov" mov\t%0.b, %1.b str\t%1, %0 ldr\t%0, %1 - pfalse\t%0.b - * return aarch64_output_ptrue (mode, '');" + * return aarch64_output_sve_mov_immediate (operands[1]);" ) ;; ========================================================================= Index: gcc/config/aarch64/aarch64.c =================================================================== --- gcc/config/aarch64/aarch64.c 2019-08-13 11:18:06.762836453 +0100 +++ gcc/config/aarch64/aarch64.c 2019-08-13 11:20:41.969713225 +0100 @@ -1635,6 +1635,16 @@ aarch64_get_mask_mode (poly_uint64 nunit return default_get_mask_mode (nunits, nbytes); } +/* Return the integer element mode associated with SVE mode MODE. */ + +static scalar_int_mode +aarch64_sve_element_int_mode (machine_mode mode) +{ + unsigned int elt_bits = vector_element_size (BITS_PER_SVE_VECTOR, + GET_MODE_NUNITS (mode)); + return int_mode_for_size (elt_bits, 0).require (); +} + /* Implement TARGET_PREFERRED_ELSE_VALUE. For binary operations, prefer to use the first arithmetic operand as the else value if the else value doesn't matter, since that exactly matches the SVE @@ -14700,8 +14710,18 @@ aarch64_simd_valid_immediate (rtx op, si /* Handle PFALSE and PTRUE. */ if (vec_flags & VEC_SVE_PRED) - return (op == CONST0_RTX (mode) - || op == CONSTM1_RTX (mode)); + { + if (op == CONST0_RTX (mode) || op == CONSTM1_RTX (mode)) + { + if (info) + { + scalar_int_mode int_mode = aarch64_sve_element_int_mode (mode); + *info = simd_immediate_info (int_mode, op == CONSTM1_RTX (mode)); + } + return true; + } + return false; + } scalar_float_mode elt_float_mode; if (n_elts == 1 @@ -16393,6 +16413,21 @@ aarch64_output_sve_mov_immediate (rtx co element_char = sizetochar (GET_MODE_BITSIZE (info.elt_mode)); + machine_mode vec_mode = GET_MODE (const_vector); + if (aarch64_sve_pred_mode_p (vec_mode)) + { + static char buf[sizeof ("ptrue\t%0.N, vlNNNNN")]; + unsigned int total_bytes; + if (info.u.mov.value == const0_rtx) + snprintf (buf, sizeof (buf), "pfalse\t%%0.b"); + else if (BYTES_PER_SVE_VECTOR.is_constant (&total_bytes)) + snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, vl%d", element_char, + total_bytes / GET_MODE_SIZE (info.elt_mode)); + else + snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, all", element_char); + return buf; + } + if (info.insn == simd_immediate_info::INDEX) { snprintf (templ, sizeof (templ), "index\t%%0.%c, #" @@ -16425,21 +16460,6 @@ aarch64_output_sve_mov_immediate (rtx co return templ; } -/* Return the asm format for a PTRUE instruction whose destination has - mode MODE. SUFFIX is the element size suffix. */ - -char * -aarch64_output_ptrue (machine_mode mode, char suffix) -{ - unsigned int nunits; - static char buf[sizeof ("ptrue\t%0.N, vlNNNNN")]; - if (GET_MODE_NUNITS (mode).is_constant (&nunits)) - snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, vl%d", suffix, nunits); - else - snprintf (buf, sizeof (buf), "ptrue\t%%0.%c, all", suffix); - return buf; -} - /* Split operands into moves from op[1] + op[2] into op[0]. */ void