From patchwork Tue Aug 13 03:40:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gustavo Romero X-Patchwork-Id: 1146003 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-104359-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="MirzIoK+"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 466z6b5mPmz9sP6 for ; Tue, 13 Aug 2019 13:41:59 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; q=dns; s= default; b=wqEzIPVBChdX1xR325OU0S/Mpp7T6T/g7FkGsHfHhZ1lTBhRd5hD0 idTRGXHrNqFfbIqSTJEE7AdH495aKJPELmXikViL1mv05suJrKLbGXGfnOHXd9C9 nnWGD9rdXxrluAZ+1N8vQjxRDSagUV1WjcixlbK/TRmjPjPSS2eGD8= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id; s=default; bh=M6zr0wZX7LlFf5SEbx5nbskc69I=; b=MirzIoK+0n06doMnwL0lEQeHeXRN 1PTD03hujLsN04NtDeFQjBOhxkM3LnOC2oF306dSeZDRms/pZG1+VQBQt98QgQp6 iNE1qhs1ud/n9Fqg5EdLtYjLjPNPICuK7MlVUgKGC0YgsM1crLWaKRj/8K/YkhFO jig13vhF8/hcdBg= Received: (qmail 113929 invoked by alias); 13 Aug 2019 03:41:52 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 113914 invoked by uid 89); 13 Aug 2019 03:41:52 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-27.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.1 spammy=nip, H*MI:vnet X-HELO: mx0a-001b2d01.pphosted.com From: Gustavo Romero To: libc-alpha@sourceware.org, gabriel@inconstante.net.br Cc: gromero@linux.vnet.ibm.com Subject: [PATCH] powerpc: Fix typos and field name in comments Date: Mon, 12 Aug 2019 23:40:30 -0400 Message-Id: <1565667630-13528-1-git-send-email-gromero@linux.vnet.ibm.com> Fix a couple of typos and v_regs field name in mcontext_t. --- ChangeLog | 5 +++++ sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h | 8 ++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/ChangeLog b/ChangeLog index 225da01..39f50b8 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2019-08-12 Gustavo Romero + + * sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h: Fix typos and + field name in mcontext_t struct. + 2019-08-12 Florian Weimer * elf/Makefile (tests): Unconditionally add tst-dlopen-aout. diff --git a/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h b/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h index 640381a..6093ade 100644 --- a/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h +++ b/sysdeps/unix/sysv/linux/powerpc/sys/ucontext.h @@ -75,12 +75,12 @@ typedef struct * a sigcontext. For older kernel (without Altivec) the sigcontext matches * the mcontext upto but not including the v_regs field. For kernels that * don't set AT_HWCAP or return AT_HWCAP without PPC_FEATURE_HAS_ALTIVEC the - * v_regs field may not exist and should not be referenced. The v_regd field - * can be refernced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC + * v_regs field may not exist and should not be referenced. The v_regs field + * can be referenced safely only after verifying that PPC_FEATURE_HAS_ALTIVEC * is set in AT_HWCAP. */ /* Number of general registers. */ -# define __NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */ +# define __NGREG 48 /* includes r0-r31, nip, msr, lr, etc. */ # define __NFPREG 33 /* includes fp0-fp31 &fpscr. */ # define __NVRREG 34 /* includes v0-v31, vscr, & vrsave in split vectors */ @@ -136,7 +136,7 @@ typedef struct { * either NULL (if this processor does not support the VMX feature) or the * address of the first quadword within the allocated (vmx_reserve) area. * - * The pointer (v_regs) of vector type (elf_vrreg_t) is essentually + * The pointer (v_regs) of vector type (elf_vrreg_t) is essentially * an array of 34 quadword entries. The entries with * indexes 0-31 contain the corresponding vector registers. The entry with * index 32 contains the vscr as the last word (offset 12) within the