From patchwork Wed Sep 14 07:44:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ming Lei X-Patchwork-Id: 114587 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 208B1B71CE for ; Wed, 14 Sep 2011 17:44:47 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751412Ab1INHop (ORCPT ); Wed, 14 Sep 2011 03:44:45 -0400 Received: from mail-yw0-f46.google.com ([209.85.213.46]:55140 "EHLO mail-yw0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751306Ab1INHop (ORCPT ); Wed, 14 Sep 2011 03:44:45 -0400 Received: by ywb5 with SMTP id 5so1192501ywb.19 for ; Wed, 14 Sep 2011 00:44:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=9op4iVF3o0khaYpeTaAs74D9Z4XRaDRjWXxI2oOUx9s=; b=uNLpKXI7V0Aeiv4FiFL/ubdKuTkqBzp3XXbF/NMPGEh2nG9ojU0A25ekX6PYIm3LIh TpW2Mmg8h2Ieg0McDox1f7QlwFlGmJw4t73JJ1/XQkmxGEk7yx196rPadbPGJcG0skUU rdzkmn8qnG+2G4GYBuo4WHh1S8sCffkr1hmBM= MIME-Version: 1.0 Received: by 10.236.201.168 with SMTP id b28mr28335483yho.117.1315986283055; Wed, 14 Sep 2011 00:44:43 -0700 (PDT) Received: by 10.236.111.5 with HTTP; Wed, 14 Sep 2011 00:44:43 -0700 (PDT) In-Reply-To: <20110906104952.0c930a93@bob.linux.org.uk> References: <20110906042101.GE18425@mtj.dyndns.org> <20110906104952.0c930a93@bob.linux.org.uk> Date: Wed, 14 Sep 2011 15:44:43 +0800 Message-ID: Subject: Re: [RFC PATCH #upstream-fixes] libata: don't use 32bit PIO for small transfers From: Ming Lei To: Alan Cox Cc: Tejun Heo , Jeff Garzik , linux-ide@vger.kernel.org, seth.heasley@intel.com Sender: linux-ide-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-ide@vger.kernel.org Hi Tejun and Alan, Thanks for your spending time on the bug. On Tue, Sep 6, 2011 at 5:49 PM, Alan Cox wrote: > > So NACK. > > Add a piix_sata_data_xfer32_maybe() function to the ata_piix driver > specifically for this chipset. Could you accept the quirk patch below to make these controllers working at least now? thanks, diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c index 43107e9..eb7ea56 100644 --- a/drivers/ata/ata_piix.c +++ b/drivers/ata/ata_piix.c @@ -341,11 +341,12 @@ static struct ata_port_operations piix_sata_ops = { }; static struct ata_port_operations piix_pata_ops = { - .inherits = &piix_sata_ops, + .inherits = &ata_bmdma32_port_ops, .cable_detect = ata_cable_40wire, .set_piomode = piix_set_piomode, .set_dmamode = piix_set_dmamode, .prereset = piix_pata_prereset, + .sff_irq_check = piix_irq_check, }; static struct ata_port_operations piix_vmw_ops = { @@ -1585,6 +1586,15 @@ static int __devinit piix_init_one(struct pci_dev *pdev, "on poweroff and hibernation\n"); } + /* + * Sandybridge chipset H61/P67/H67 have broken 32 mode up to now + * see https://bugzilla.kernel.org/show_bug.cgi?id=40592 + */ + if (pdev->vendor == PCI_VENDOR_ID_INTEL && pdev->device == 0x1c00) + piix_sata_ops.inherits = &ata_bmdma_port_ops; + else + piix_sata_ops.inherits = &ata_bmdma32_port_ops; + port_info[0] = piix_port_info[ent->driver_data]; port_info[1] = piix_port_info[ent->driver_data];