From patchwork Sun Aug 11 10:40:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jitao Shi X-Patchwork-Id: 1145289 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 465wWM228Xz9sP9 for ; Sun, 11 Aug 2019 20:41:19 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726541AbfHKKkz (ORCPT ); Sun, 11 Aug 2019 06:40:55 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:43394 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726510AbfHKKkx (ORCPT ); Sun, 11 Aug 2019 06:40:53 -0400 X-UUID: 7cb4b3d1ac4b46bd9043762f13ec7747-20190811 X-UUID: 7cb4b3d1ac4b46bd9043762f13ec7747-20190811 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 2042052334; Sun, 11 Aug 2019 18:40:51 +0800 Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS33N1.mediatek.inc (172.27.4.75) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Sun, 11 Aug 2019 18:40:47 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS32.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Sun, 11 Aug 2019 18:40:46 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , , David Airlie , Matthias Brugger CC: Jitao Shi , Thierry Reding , Ajay Kumar , Inki Dae , Rahul Sharma , Sean Paul , Vincent Palatin , Andy Yan , Philipp Zabel , Russell King , , , , , , , Sascha Hauer , , , , , , Subject: [PATCH v6 5/7] drm/mediatek: add mt8183 dsi driver support Date: Sun, 11 Aug 2019 18:40:06 +0800 Message-ID: <20190811104008.53372-6-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190811104008.53372-1-jitao.shi@mediatek.com> References: <20190811104008.53372-1-jitao.shi@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 115C68D5AFF523B862A455F59293ED2A25A28DC8FC53698C637F8CF8A72DF05D2000:8 X-MTK: N Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Add mt8183 dsi driver data. Enable size control and reg commit control. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 68794edecf96..b3676426aeb5 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -1227,11 +1227,19 @@ static const struct mtk_dsi_driver_data mt2701_dsi_driver_data = { .reg_cmdq_off = 0x180, }; +static const struct mtk_dsi_driver_data mt8183_dsi_driver_data = { + .reg_cmdq_off = 0x200, + .has_shadow_ctl = true, + .has_size_ctl = true, +}; + static const struct of_device_id mtk_dsi_of_match[] = { { .compatible = "mediatek,mt2701-dsi", .data = &mt2701_dsi_driver_data }, { .compatible = "mediatek,mt8173-dsi", .data = &mt8173_dsi_driver_data }, + { .compatible = "mediatek,mt8183-dsi", + .data = &mt8183_dsi_driver_data }, { }, };