[v2,2/4] npu3: Don't use the device tree to assign the phb-index of the PHB
diff mbox series

Message ID 20190809130534.9152-2-fbarrat@linux.ibm.com
State New
Headers show
Series
  • [v2,1/4] npu2: Rework phb-index assignments for virtual PHBs
Related show

Checks

Context Check Description
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (0e1db80c70477d89a73c7f2a1a7e19c7d8292c5f)

Commit Message

Frederic Barrat Aug. 9, 2019, 1:05 p.m. UTC
On Axone, there's a 1-to-1 mapping between virtual PHBs and NPUs. We
could keep assigning the phb-index of the virtual PHB from the value
found in the npu node of the device tree, but to be consistent with
P9/npu2 and avoid confusion, this patch assigns the phb-index when the
virtual PHB is created, based on the npu index, similarly to what we
do on P9.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
---
Changelog;
v2:
 - new patch: separate the axone bits from the first patch


 hw/npu3-nvlink.c | 2 +-
 include/npu3.h   | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

Comments

Reza Arbab Aug. 12, 2019, 9:20 p.m. UTC | #1
On Fri, Aug 09, 2019 at 03:05:32PM +0200, Frederic Barrat wrote:
>On Axone, there's a 1-to-1 mapping between virtual PHBs and NPUs. We
>could keep assigning the phb-index of the virtual PHB from the value
>found in the npu node of the device tree, but to be consistent with
>P9/npu2 and avoid confusion, this patch assigns the phb-index when the
>virtual PHB is created, based on the npu index, similarly to what we
>do on P9.
>
>Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>

Reviewed-by: Reza Arbab <arbab@linux.ibm.com>
Andrew Donnellan Sept. 26, 2019, 12:04 p.m. UTC | #2
On 9/8/19 3:05 pm, Frederic Barrat wrote:
> On Axone, there's a 1-to-1 mapping between virtual PHBs and NPUs. We
> could keep assigning the phb-index of the virtual PHB from the value
> found in the npu node of the device tree, but to be consistent with
> P9/npu2 and avoid confusion, this patch assigns the phb-index when the
> virtual PHB is created, based on the npu index, similarly to what we
> do on P9.
> 
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>

Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com>

> ---
> Changelog;
> v2:
>   - new patch: separate the axone bits from the first patch
> 
> 
>   hw/npu3-nvlink.c | 2 +-
>   include/npu3.h   | 6 ++++++
>   2 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/hw/npu3-nvlink.c b/hw/npu3-nvlink.c
> index 7e7a10e8..99608368 100644
> --- a/hw/npu3-nvlink.c
> +++ b/hw/npu3-nvlink.c
> @@ -1461,7 +1461,7 @@ static void npu3_dt_add_props(struct npu3 *npu)
>   				"ibm,ioda2-npu2-phb");
>   
>   	dt_add_property_cells(dn, "ibm,phb-index",
> -			      dt_prop_get_u32(npu->dt_node, "ibm,phb-index"));
> +			      npu3_get_phb_index(npu->index));
>   	dt_add_property_cells(dn, "ibm,phb-diag-data-size", 0);
>   	dt_add_property_cells(dn, "ibm,opal-num-pes", NPU3_MAX_PE_NUM);
>   	dt_add_property_cells(dn, "ibm,opal-reserved-pe", NPU3_RESERVED_PE_NUM);
> diff --git a/include/npu3.h b/include/npu3.h
> index 1c657f94..0fdad4df 100644
> --- a/include/npu3.h
> +++ b/include/npu3.h
> @@ -177,4 +177,10 @@ int64_t npu3_map_lpar(struct phb *phb, uint64_t bdf, uint64_t lparid,
>   int64_t npu3_set_relaxed_order(struct phb *phb, uint32_t gcid, int pec,
>   			       bool enable);
>   
> +#define NPU3_PHB_INDEX_BASE     6 /* immediately after real PHBs */
> +static inline int npu3_get_phb_index(unsigned int npu_index)
> +{
> +	return NPU3_PHB_INDEX_BASE + npu_index;
> +}
> +
>   #endif /* __NPU3_H */
>

Patch
diff mbox series

diff --git a/hw/npu3-nvlink.c b/hw/npu3-nvlink.c
index 7e7a10e8..99608368 100644
--- a/hw/npu3-nvlink.c
+++ b/hw/npu3-nvlink.c
@@ -1461,7 +1461,7 @@  static void npu3_dt_add_props(struct npu3 *npu)
 				"ibm,ioda2-npu2-phb");
 
 	dt_add_property_cells(dn, "ibm,phb-index",
-			      dt_prop_get_u32(npu->dt_node, "ibm,phb-index"));
+			      npu3_get_phb_index(npu->index));
 	dt_add_property_cells(dn, "ibm,phb-diag-data-size", 0);
 	dt_add_property_cells(dn, "ibm,opal-num-pes", NPU3_MAX_PE_NUM);
 	dt_add_property_cells(dn, "ibm,opal-reserved-pe", NPU3_RESERVED_PE_NUM);
diff --git a/include/npu3.h b/include/npu3.h
index 1c657f94..0fdad4df 100644
--- a/include/npu3.h
+++ b/include/npu3.h
@@ -177,4 +177,10 @@  int64_t npu3_map_lpar(struct phb *phb, uint64_t bdf, uint64_t lparid,
 int64_t npu3_set_relaxed_order(struct phb *phb, uint32_t gcid, int pec,
 			       bool enable);
 
+#define NPU3_PHB_INDEX_BASE     6 /* immediately after real PHBs */
+static inline int npu3_get_phb_index(unsigned int npu_index)
+{
+	return NPU3_PHB_INDEX_BASE + npu_index;
+}
+
 #endif /* __NPU3_H */