From patchwork Fri Aug 9 09:31:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 1144537 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=v3.sk Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 464g5V6hVhz9sP7 for ; Fri, 9 Aug 2019 19:33:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2406232AbfHIJc6 (ORCPT ); Fri, 9 Aug 2019 05:32:58 -0400 Received: from shell.v3.sk ([90.176.6.54]:51845 "EHLO shell.v3.sk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2406209AbfHIJcv (ORCPT ); Fri, 9 Aug 2019 05:32:51 -0400 Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id ED447D63D0; Fri, 9 Aug 2019 11:32:41 +0200 (CEST) Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id Ot8nMOCSuZGo; Fri, 9 Aug 2019 11:32:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.v3.sk (Postfix) with ESMTP id 84DC2D63BF; Fri, 9 Aug 2019 11:32:15 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.v3.sk Received: from shell.v3.sk ([127.0.0.1]) by localhost (zimbra.v3.sk [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id 3IHxjYBNVwjk; Fri, 9 Aug 2019 11:32:11 +0200 (CEST) Received: from furthur.local (ip-37-188-137-236.eurotel.cz [37.188.137.236]) by zimbra.v3.sk (Postfix) with ESMTPSA id 861A8D63BD; Fri, 9 Aug 2019 11:32:10 +0200 (CEST) From: Lubomir Rintel To: Olof Johansson Cc: Rob Herring , Mark Rutland , Thomas Gleixner , Jason Cooper , Marc Zyngier , Kishon Vijay Abraham I , Russell King , Michael Turquette , Stephen Boyd , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Lubomir Rintel Subject: [PATCH 03/19] dt-bindings: mrvl, intc: Add a MMP3 interrupt controller Date: Fri, 9 Aug 2019 11:31:42 +0200 Message-Id: <20190809093158.7969-4-lkundrak@v3.sk> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190809093158.7969-1-lkundrak@v3.sk> References: <20190809093158.7969-1-lkundrak@v3.sk> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Similar to MMP2 one, but has an extra range for the other core. The muxes stay the same. Signed-off-by: Lubomir Rintel --- .../interrupt-controller/mrvl,intc.txt | 23 ++++++++++++++----- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt index 608fee15a4cfc..41c131d026f94 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt @@ -1,13 +1,15 @@ * Marvell MMP Interrupt controller Required properties: -- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or - "mrvl,mmp2-mux-intc" +- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc", + "marvell,mmp3-intc", "mrvl,mmp2-mux-intc" - reg : Address and length of the register set of the interrupt controller. If the interrupt controller is intc, address and length means the range - of the whole interrupt controller. If the interrupt controller is mux-intc, - address and length means one register. Since address of mux-intc is in the - range of intc. mux-intc is secondary interrupt controller. + of the whole interrupt controller. The "marvell,mmp3-intc" controller + also has a secondary range for the second CPU core. If the interrupt + controller is mux-intc, address and length means one register. Since + address of mux-intc is in the range of intc. mux-intc is secondary + interrupt controller. - reg-names : Name of the register set of the interrupt controller. It's only required in mux-intc interrupt controller. - interrupts : Should be the port interrupt shared by mux interrupts. It's @@ -20,7 +22,7 @@ Required properties: - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge detection first. -Example: +Examples: intc: interrupt-controller@d4282000 { compatible = "mrvl,mmp2-intc"; interrupt-controller; @@ -29,6 +31,15 @@ Example: mrvl,intc-nr-irqs = <64>; }; + intc: interrupt-controller@d4282000 { + compatible = "marvell,mmp3-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0xd4282000 0x1000>, + <0xd4284000 0x100>; + mrvl,intc-nr-irqs = <64>; + }; + intcmux4@d4282150 { compatible = "mrvl,mmp2-mux-intc"; interrupts = <4>;