[03/19] dt-bindings: mrvl,intc: Add a MMP3 interrupt controller
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Message ID 20190809093158.7969-4-lkundrak@v3.sk
State Needs Review / ACK
Headers show
Series
  • Initial support for Marvell MMP3 SoC
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Context Check Description
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Commit Message

Lubomir Rintel Aug. 9, 2019, 9:31 a.m. UTC
Similar to MMP2 one, but has an extra range for the other core. The
muxes stay the same.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
---
 .../interrupt-controller/mrvl,intc.txt        | 23 ++++++++++++++-----
 1 file changed, 17 insertions(+), 6 deletions(-)

Patch
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diff --git a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
index 608fee15a4cfc..41c131d026f94 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/mrvl,intc.txt
@@ -1,13 +1,15 @@ 
 * Marvell MMP Interrupt controller
 
 Required properties:
-- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
-  "mrvl,mmp2-mux-intc"
+- compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc",
+  "marvell,mmp3-intc", "mrvl,mmp2-mux-intc"
 - reg : Address and length of the register set of the interrupt controller.
   If the interrupt controller is intc, address and length means the range
-  of the whole interrupt controller. If the interrupt controller is mux-intc,
-  address and length means one register. Since address of mux-intc is in the
-  range of intc. mux-intc is secondary interrupt controller.
+  of the whole interrupt controller. The "marvell,mmp3-intc" controller
+  also has a secondary range for the second CPU core.  If the interrupt
+  controller is mux-intc, address and length means one register. Since
+  address of mux-intc is in the range of intc. mux-intc is secondary
+  interrupt controller.
 - reg-names : Name of the register set of the interrupt controller. It's
   only required in mux-intc interrupt controller.
 - interrupts : Should be the port interrupt shared by mux interrupts. It's
@@ -20,7 +22,7 @@  Required properties:
 - mrvl,clr-mfp-irq : Specifies the interrupt that needs to clear MFP edge
   detection first.
 
-Example:
+Examples:
 	intc: interrupt-controller@d4282000 {
 		compatible = "mrvl,mmp2-intc";
 		interrupt-controller;
@@ -29,6 +31,15 @@  Example:
 		mrvl,intc-nr-irqs = <64>;
 	};
 
+	intc: interrupt-controller@d4282000 {
+		compatible = "marvell,mmp3-intc";
+		interrupt-controller;
+		#interrupt-cells = <1>;
+		reg = <0xd4282000 0x1000>,
+		      <0xd4284000 0x100>;
+		mrvl,intc-nr-irqs = <64>;
+	};
+
 	intcmux4@d4282150 {
 		compatible = "mrvl,mmp2-mux-intc";
 		interrupts = <4>;