Message ID | 20190809043014.32510-3-peng.fan@nxp.com |
---|---|
State | Superseded |
Delegated to: | Stefano Babic |
Headers | show |
Series | i.MX8MM support | expand |
On 09.08.19 06:14, Peng Fan wrote: > With SPL_OF_SPERATE, the device tree will be padded to ^ Do you mean CONFIG_SPL_OF_CONTROL? > end of the u-boot-spl-nodtb.bin, however we also put > the ddr firmware file to this location, so need to adapt > the code with SPL OF and align to 16bytes to ease copy firmware. ^ I think this should be 4 bytes > > Signed-off-by: Peng Fan <peng.fan@nxp.com> I think this patch should be merged with the previous one (01/22), because if one is applied without the other it would break things. > --- > drivers/ddr/imx/imx8m/helper.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c > index 61cd4f6db1..3e605353ea 100644 > --- a/drivers/ddr/imx/imx8m/helper.c > +++ b/drivers/ddr/imx/imx8m/helper.c > @@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type) > unsigned long pr_to32, pr_from32; > unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0; > unsigned long imem_start = (unsigned long)&_end + fw_offset; > - unsigned long dmem_start = imem_start + IMEM_LEN; > + unsigned long dmem_start; > + > +#ifdef CONFIG_SPL_OF_CONTROL > + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { > + imem_start = roundup((unsigned long)&_end + > + fdt_totalsize(gd->fdt_blob), 4) + > + fw_offset; > + } > +#endif > + > + dmem_start = imem_start + IMEM_LEN; > > pr_from32 = imem_start; > pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR; >
Hi, > Subject: Re: [PATCH 02/22] ddr: imx8m: fix ddr firmware location when enable > SPL OF > > On 09.08.19 06:14, Peng Fan wrote: > > With SPL_OF_SPERATE, the device tree will be padded to > > ^ Do you mean CONFIG_SPL_OF_CONTROL? Yes. Thanks. > > > end of the u-boot-spl-nodtb.bin, however we also put the ddr firmware > > file to this location, so need to adapt the code with SPL OF and align > > to 16bytes to ease copy firmware. > > ^ I think this should be 4 bytes Yes. > > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com> > > I think this patch should be merged with the previous one (01/22), because if > one is applied without the other it would break things. Currently only i.MX8MQ EVK is using the code, i.MX8MQ not enable SPL OF, so it will not break things. Thanks, Peng. > > > --- > > drivers/ddr/imx/imx8m/helper.c | 12 +++++++++++- > > 1 file changed, 11 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/ddr/imx/imx8m/helper.c > > b/drivers/ddr/imx/imx8m/helper.c index 61cd4f6db1..3e605353ea 100644 > > --- a/drivers/ddr/imx/imx8m/helper.c > > +++ b/drivers/ddr/imx/imx8m/helper.c > > @@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type) > > unsigned long pr_to32, pr_from32; > > unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0; > > unsigned long imem_start = (unsigned long)&_end + fw_offset; > > - unsigned long dmem_start = imem_start + IMEM_LEN; > > + unsigned long dmem_start; > > + > > +#ifdef CONFIG_SPL_OF_CONTROL > > + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { > > + imem_start = roundup((unsigned long)&_end + > > + fdt_totalsize(gd->fdt_blob), 4) + > > + fw_offset; > > + } > > +#endif > > + > > + dmem_start = imem_start + IMEM_LEN; > > > > pr_from32 = imem_start; > > pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * > IMEM_OFFSET_ADDR; > >
On 14.08.19 09:59, Peng Fan wrote: > Hi, > >> Subject: Re: [PATCH 02/22] ddr: imx8m: fix ddr firmware location when enable >> SPL OF >> >> On 09.08.19 06:14, Peng Fan wrote: >>> With SPL_OF_SPERATE, the device tree will be padded to >> >> ^ Do you mean CONFIG_SPL_OF_CONTROL? > Yes. Thanks. >> >>> end of the u-boot-spl-nodtb.bin, however we also put the ddr firmware >>> file to this location, so need to adapt the code with SPL OF and align >>> to 16bytes to ease copy firmware. >> >> ^ I think this should be 4 bytes > Yes. > >> >>> >>> Signed-off-by: Peng Fan <peng.fan@nxp.com> >> >> I think this patch should be merged with the previous one (01/22), because if >> one is applied without the other it would break things. > > Currently only i.MX8MQ EVK is using the code, i.MX8MQ not enable SPL OF, > so it will not break things. Ok, so with the changes to the commit message above: Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de> > > Thanks, > Peng. > >> >>> --- >>> drivers/ddr/imx/imx8m/helper.c | 12 +++++++++++- >>> 1 file changed, 11 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/ddr/imx/imx8m/helper.c >>> b/drivers/ddr/imx/imx8m/helper.c index 61cd4f6db1..3e605353ea 100644 >>> --- a/drivers/ddr/imx/imx8m/helper.c >>> +++ b/drivers/ddr/imx/imx8m/helper.c >>> @@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type) >>> unsigned long pr_to32, pr_from32; >>> unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0; >>> unsigned long imem_start = (unsigned long)&_end + fw_offset; >>> - unsigned long dmem_start = imem_start + IMEM_LEN; >>> + unsigned long dmem_start; >>> + >>> +#ifdef CONFIG_SPL_OF_CONTROL >>> + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { >>> + imem_start = roundup((unsigned long)&_end + >>> + fdt_totalsize(gd->fdt_blob), 4) + >>> + fw_offset; >>> + } >>> +#endif >>> + >>> + dmem_start = imem_start + IMEM_LEN; >>> >>> pr_from32 = imem_start; >>> pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * >> IMEM_OFFSET_ADDR; >>>
diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c index 61cd4f6db1..3e605353ea 100644 --- a/drivers/ddr/imx/imx8m/helper.c +++ b/drivers/ddr/imx/imx8m/helper.c @@ -31,7 +31,17 @@ void ddr_load_train_firmware(enum fw_type type) unsigned long pr_to32, pr_from32; unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0; unsigned long imem_start = (unsigned long)&_end + fw_offset; - unsigned long dmem_start = imem_start + IMEM_LEN; + unsigned long dmem_start; + +#ifdef CONFIG_SPL_OF_CONTROL + if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) { + imem_start = roundup((unsigned long)&_end + + fdt_totalsize(gd->fdt_blob), 4) + + fw_offset; + } +#endif + + dmem_start = imem_start + IMEM_LEN; pr_from32 = imem_start; pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
With SPL_OF_SPERATE, the device tree will be padded to end of the u-boot-spl-nodtb.bin, however we also put the ddr firmware file to this location, so need to adapt the code with SPL OF and align to 16bytes to ease copy firmware. Signed-off-by: Peng Fan <peng.fan@nxp.com> --- drivers/ddr/imx/imx8m/helper.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-)