From patchwork Fri Aug 9 04:12:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jordan Niethe X-Patchwork-Id: 1144324 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 464X0v18bJz9sP3 for ; Fri, 9 Aug 2019 14:13:35 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ry0t3Pup"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 464X0t6lzFzDqws for ; Fri, 9 Aug 2019 14:13:34 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::641; helo=mail-pl1-x641.google.com; envelope-from=jniethe5@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ry0t3Pup"; dkim-atps=neutral Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 464X0C6JgHzDqxZ for ; Fri, 9 Aug 2019 14:12:59 +1000 (AEST) Received: by mail-pl1-x641.google.com with SMTP id w24so44422846plp.2 for ; Thu, 08 Aug 2019 21:12:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kU2SyKMaKLMeozSC7htFp7gfYSdLKFcDIURg1kpCSVg=; b=ry0t3Pupx3yq8F9CxhL5mu5+mzb/sTp3tIkc704zqq/5+go48nltNmtzXDZsjfe5zV oNffOhWUIgUyV40nyvTjuJVjHXQqbZ+5iwhtVXZZUOlO7cXR/SReO9xcwd0zKQp4Nuzd z7SF9oIjgShFlp99IdY/lpBiIVtnbGn5SuihDZLmptDMigwTbcQcRhb2sM9hPsbwMy9c 4hpPGltrvp2mVqdVkLaMWuWr3jW043zYQUdR4SJfyznqk5cA5E2r2z7J4B5KhtoTw77/ zeH8AEktfr9C2cdCPDeDFx9rvwIrTteq5CpCQQJXkwT+Yxx3fNOjZU3HIhUS59aAFlsX S+OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kU2SyKMaKLMeozSC7htFp7gfYSdLKFcDIURg1kpCSVg=; b=MfF83+nFuw1w1z0aWoOOlx0WjihiaL29+5LHWqyG82ZXNatladHEYx5+sFCwtwIXQj wCJ1RwnEYiDAVzzWLinFRdqV6H71+3qolDgDzIhGFf6qzAWahHt8jdG1H593xGiEt1Cq fw2yML6rcD3atEcTlaor9pvCrUP3oaxVR1xlBHUobeqIJoWwN29NJC8RVI6HUp0L2tzi Eodn5gxb+t16zUz8Ua7fscJ4UEptR6al1SHHL4RcrNbQUhg82qEVHdDgs7wjAqkLITHp NbfbzX32HLBMKNoVRi+ifdM8yUJiRx3EaWubfhg6Q6tvHMldIDWZpO5aUK0OGvAwzHC0 N+1g== X-Gm-Message-State: APjAAAU7rhd0pg2QYgBtUFZ0vU7WJw+a1kuupojqY/Iy1YChdJqZvKd6 OR2R+WuwsLf1UDqcWZv2iSO+uf9n2PA= X-Google-Smtp-Source: APXvYqzPdllhB0j7unh4Zyo44Bdn57VlSpyH2Pjqtp9fi8R6hP31XaxcXNnhrV+JwBNoX/gs6GXowg== X-Received: by 2002:a17:902:8ec3:: with SMTP id x3mr16706534plo.313.1565323977158; Thu, 08 Aug 2019 21:12:57 -0700 (PDT) Received: from pasglop.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id c69sm9759855pje.6.2019.08.08.21.12.55 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 08 Aug 2019 21:12:56 -0700 (PDT) From: Jordan Niethe To: skiboot@lists.ozlabs.org Date: Fri, 9 Aug 2019 14:12:19 +1000 Message-Id: <20190809041220.18245-3-jniethe5@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190809041220.18245-1-jniethe5@gmail.com> References: <20190809041220.18245-1-jniethe5@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH 3/4] pci: Use a macro for accessing PCI BDF Device Number X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Currently when the Device Number bits of a BDF are needed the bit operations to get it are free coded. There are many places where the Device Number is used, so make a macro to use instead of free coding it everytime. Signed-off-by: Jordan Niethe --- core/pci-dt-slot.c | 2 +- core/pci.c | 6 +++--- hw/npu2.c | 2 +- hw/npu3-nvlink.c | 6 +++--- include/npu2.h | 2 +- include/pci.h | 8 ++++---- include/skiboot.h | 1 + platforms/astbmc/vesnin.c | 2 +- platforms/ibm-fsp/lxvpd.c | 2 +- 9 files changed, 16 insertions(+), 15 deletions(-) diff --git a/core/pci-dt-slot.c b/core/pci-dt-slot.c index f0d22c3738e7..034422c2a848 100644 --- a/core/pci-dt-slot.c +++ b/core/pci-dt-slot.c @@ -53,7 +53,7 @@ static struct dt_node *map_phb_to_slot(struct phb *phb) static struct dt_node *find_devfn(struct dt_node *bus, uint32_t bdfn) { - uint32_t port_dev_id = (bdfn >> 3) & 0x1f; + uint32_t port_dev_id = PCI_DEV(bdfn); struct dt_node *child; dt_for_each_child(bus, child) diff --git a/core/pci.c b/core/pci.c index 1f81c65e4933..c9b262f38b93 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1576,10 +1576,10 @@ static void __noinline pci_add_one_device_node(struct phb *phb, if (pd->bdfn & 0x7) snprintf(name, MAX_NAME - 1, "%s@%x,%x", - cname, (pd->bdfn >> 3) & 0x1f, pd->bdfn & 0x7); + cname, PCI_DEV(pd->bdfn), pd->bdfn & 0x7); else snprintf(name, MAX_NAME - 1, "%s@%x", - cname, (pd->bdfn >> 3) & 0x1f); + cname, PCI_DEV(pd->bdfn)); pd->dn = np = dt_new(parent_node, name); /* @@ -1657,7 +1657,7 @@ static void __noinline pci_add_one_device_node(struct phb *phb, /* Update the current interrupt swizzling level based on our own * device number */ - swizzle = (swizzle + ((pd->bdfn >> 3) & 0x1f)) & 3; + swizzle = (swizzle + PCI_DEV(pd->bdfn)) & 3; /* We generate a standard-swizzling interrupt map. This is pretty * big, we *could* try to be smarter for things that aren't hotplug diff --git a/hw/npu2.c b/hw/npu2.c index 29c998f60ae1..f561386f5865 100644 --- a/hw/npu2.c +++ b/hw/npu2.c @@ -548,7 +548,7 @@ static void npu2_get_gpu_base(struct npu2_dev *ndev, uint64_t *addr, uint64_t *s struct npu2 *p = ndev->npu; int group; - group = (ndev->bdfn >> 3) & 0x1f; + group = PCI_DEV(ndev->bdfn); phys_map_get(ndev->npu->chip_id, p->gpu_map_type, group, addr, size); } diff --git a/hw/npu3-nvlink.c b/hw/npu3-nvlink.c index 3297125e4b25..c61e1b7b5ba1 100644 --- a/hw/npu3-nvlink.c +++ b/hw/npu3-nvlink.c @@ -29,7 +29,7 @@ prlog(l, "NPU#%04x:%02x:%02x.%x " fmt, \ (dev)->npu->nvlink.phb.opal_id, \ PCI_BUS_NUM((dev)->nvlink.pvd->bdfn), \ - (dev)->nvlink.pvd->bdfn >> 3 & 0x1f, \ + PCI_DEV((dev)->nvlink.pvd->bdfn), \ (dev)->nvlink.pvd->bdfn & 0x7, ##a) #define NPU3DEVDBG(dev, fmt, a...) NPU3DEVLOG(PR_DEBUG, dev, fmt, ##a) #define NPU3DEVINF(dev, fmt, a...) NPU3DEVLOG(PR_INFO, dev, fmt, ##a) @@ -1594,7 +1594,7 @@ int64_t npu3_init_context(struct phb *phb, uint64_t msr, uint64_t bdf) lparshort = GETFIELD(NPU3_XTS_BDF_MAP_LPARSHORT, map); NPU3DBG(npu, "Found LPARSHORT 0x%x for bdf %02llx:%02llx.%llx\n", - lparshort, PCI_BUS_NUM(bdf), bdf >> 3 & 0x1f, bdf & 0x7); + lparshort, PCI_BUS_NUM(bdf), PCI_DEV(bdf), bdf & 0x7); rc = npu3_init_context_pid(npu, lparshort, msr); if (rc) @@ -1711,7 +1711,7 @@ int64_t npu3_map_lpar(struct phb *phb, uint64_t bdf, uint64_t lparid, if (!dev || dev->nvlink.gpu->bdfn != bdf) { NPU3ERR(npu, "Can't find a link for bdf %02llx:%02llx.%llx\n", - PCI_BUS_NUM(bdf), bdf >> 3 & 0x1f, bdf & 0x7); + PCI_BUS_NUM(bdf), PCI_DEV(bdf), bdf & 0x7); rc = OPAL_PARAMETER; goto out; } diff --git a/include/npu2.h b/include/npu2.h index 372d1bed2ac2..282ee8b065c5 100644 --- a/include/npu2.h +++ b/include/npu2.h @@ -19,7 +19,7 @@ #define NPU2DEVLOG(l, p, fmt, a...) prlog(l, "NPU%d:%d:%d.%d " fmt, \ (p)->npu->phb_nvlink.opal_id, \ PCI_BUS_NUM((p)->bdfn), \ - ((p)->bdfn >> 3) & 0x1f, \ + PCI_DEV((p)->bdfn), \ (p)->bdfn & 0x7, ##a) #define NPU2DEVDBG(p, fmt, a...) NPU2DEVLOG(PR_DEBUG, p, fmt, ##a) #define NPU2DEVINF(p, fmt, a...) NPU2DEVLOG(PR_INFO, p, fmt, ##a) diff --git a/include/pci.h b/include/pci.h index cb330634a587..f837e0f3fe67 100644 --- a/include/pci.h +++ b/include/pci.h @@ -14,22 +14,22 @@ prlog(PR_TRACE, "PHB#%04x:%02x:%02x.%x " fmt, \ (_p)->opal_id, \ PCI_BUS_NUM(_bdfn), \ - ((_bdfn) >> 3) & 0x1f, (_bdfn) & 0x7, ## a) + PCI_DEV(_bdfn), (_bdfn) & 0x7, ## a) #define PCIDBG(_p, _bdfn, fmt, a...) \ prlog(PR_DEBUG, "PHB#%04x:%02x:%02x.%x " fmt, \ (_p)->opal_id, \ PCI_BUS_NUM(_bdfn), \ - ((_bdfn) >> 3) & 0x1f, (_bdfn) & 0x7, ## a) + PCI_DEV(_bdfn), (_bdfn) & 0x7, ## a) #define PCINOTICE(_p, _bdfn, fmt, a...) \ prlog(PR_NOTICE, "PHB#%04x:%02x:%02x.%x " fmt, \ (_p)->opal_id, \ PCI_BUS_NUM(_bdfn), \ - ((_bdfn) >> 3) & 0x1f, (_bdfn) & 0x7, ## a) + PCI_DEV(_bdfn), (_bdfn) & 0x7, ## a) #define PCIERR(_p, _bdfn, fmt, a...) \ prlog(PR_ERR, "PHB#%04x:%02x:%02x.%x " fmt, \ (_p)->opal_id, \ PCI_BUS_NUM(_bdfn), \ - ((_bdfn) >> 3) & 0x1f, (_bdfn) & 0x7, ## a) + PCI_DEV(_bdfn), (_bdfn) & 0x7, ## a) struct pci_device; struct pci_cfg_reg_filter; diff --git a/include/skiboot.h b/include/skiboot.h index 1dc690c7aea4..22aa58c323d8 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -139,6 +139,7 @@ static inline bool is_pow2(unsigned long val) /* PCI Geographical Addressing */ #define PCI_BUS_NUM(bdfn) (((bdfn) >> 8) & 0xff) +#define PCI_DEV(bdfn) (((bdfn) >> 3) & 0x1f) /* Clean the stray high bit which the FSP inserts: we only have 52 bits real */ static inline u64 cleanup_addr(u64 addr) diff --git a/platforms/astbmc/vesnin.c b/platforms/astbmc/vesnin.c index d138cdc3c11c..3204bc5a6382 100644 --- a/platforms/astbmc/vesnin.c +++ b/platforms/astbmc/vesnin.c @@ -268,7 +268,7 @@ static int pciinv_walk(struct phb *phb, struct pci_device *pd, void *data) /* Fill the PCI device inventory description */ pack->device.domain_num = cpu_to_be16(phb->opal_id & 0xffff); pack->device.bus_num = PCI_BUS_NUM(pd->bdfn); - pack->device.device_num = (pd->bdfn >> 3) & 0x1f; + pack->device.device_num = PCI_DEV(pd->bdfn); pack->device.func_num = pd->bdfn & 0x7; pack->device.vendor_id = cpu_to_be16(PCI_VENDOR_ID(pd->vdid)); pack->device.device_id = cpu_to_be16(PCI_DEVICE_ID(pd->vdid)); diff --git a/platforms/ibm-fsp/lxvpd.c b/platforms/ibm-fsp/lxvpd.c index 39c1cbfd5b72..bdebc44a7893 100644 --- a/platforms/ibm-fsp/lxvpd.c +++ b/platforms/ibm-fsp/lxvpd.c @@ -66,7 +66,7 @@ void *lxvpd_get_slot(struct pci_slot *slot) struct pci_device *pd = slot->pd; struct lxvpd_pci_slot_data *sdata = phb->platform_data; struct lxvpd_pci_slot *s = NULL; - uint8_t slot_num = pd ? ((pd->bdfn >> 3) & 0x1f) : 0xff; + uint8_t slot_num = pd ? PCI_DEV(pd->bdfn) : 0xff; bool is_phb = (pd && pd->parent) ? false : true; uint8_t index;