From patchwork Mon Sep 12 13:07:53 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Avi Kivity X-Patchwork-Id: 114340 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 53C75B70DC for ; Mon, 12 Sep 2011 23:08:12 +1000 (EST) Received: from localhost ([::1]:43059 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R36F7-0001iT-P8 for incoming@patchwork.ozlabs.org; Mon, 12 Sep 2011 09:08:09 -0400 Received: from eggs.gnu.org ([140.186.70.92]:33915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R36F1-0001ff-O2 for qemu-devel@nongnu.org; Mon, 12 Sep 2011 09:08:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R36Ev-0000DF-V3 for qemu-devel@nongnu.org; Mon, 12 Sep 2011 09:08:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32995) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R36Ev-0000D9-Mu for qemu-devel@nongnu.org; Mon, 12 Sep 2011 09:07:57 -0400 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p8CD7u2S025360 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Mon, 12 Sep 2011 09:07:56 -0400 Received: from cleopatra.tlv.redhat.com (cleopatra.tlv.redhat.com [10.35.255.11]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p8CD7tqa030533; Mon, 12 Sep 2011 09:07:55 -0400 Received: from s01.tlv.redhat.com (s01.tlv.redhat.com [10.35.255.8]) by cleopatra.tlv.redhat.com (Postfix) with ESMTP id F2099250B57; Mon, 12 Sep 2011 16:07:54 +0300 (IDT) From: Avi Kivity To: Anthony Liguori , qemu-devel@nongnu.org Date: Mon, 12 Sep 2011 16:07:53 +0300 Message-Id: <1315832873-18976-1-git-send-email-avi@redhat.com> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.23 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH] mips_malta: move i8259 initialization after piix4 initialization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org i8259 is an ISA device (or at least, depends on the ISA infrastructure to register its ioport); and the ISA bus is supplied by piix4. Later patches make this dependency explicit. Move the i8259 initialization until after the ISA bus is created; and supply a new qemu_irq to PCI initialization, since the i8259 isn't ready yet. Later wire the new qemu_irq to the i8259. Signed-off-by: Avi Kivity Reviewed-by: Richard Henderson Tested-by: Stefan Weil Reviewed-by: Anthony Liguori --- Part of batch 7, but nasty, so sending it by itself. Not sure this is the right approach - the i8259 is not really an ISA device. However, disentangling it from ISA is hard. hw/mips_malta.c | 27 ++++++++++++++++++++++----- 1 files changed, 22 insertions(+), 5 deletions(-) diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 0110daa..f7297e7 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -72,6 +72,10 @@ SerialState *uart; } MaltaFPGAState; +typedef struct MaltaISAState { + qemu_irq *i8259; +} MaltaISAState; + static ISADevice *pit; static struct _loaderparams { @@ -763,6 +767,15 @@ static void cpu_request_exit(void *opaque, int irq, int level) } } +static void malta_isa_irq_handler(void *opaque, int n, int level) +{ + MaltaISAState *s = opaque; + + if (s->i8259) { + qemu_set_irq(s->i8259[n], level); + } +} + static void mips_malta_init (ram_addr_t ram_size, const char *boot_device, @@ -778,7 +791,8 @@ void mips_malta_init (ram_addr_t ram_size, int64_t kernel_entry; PCIBus *pci_bus; CPUState *env; - qemu_irq *i8259; + qemu_irq *i8259, *isa_irq; + MaltaISAState *malta_isa = g_new0(MaltaISAState, 1); qemu_irq *cpu_exit_irq; int piix4_devfn; i2c_bus *smbus; @@ -928,17 +942,20 @@ void mips_malta_init (ram_addr_t ram_size, cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); - /* Interrupt controller */ - /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ - i8259 = i8259_init(env->irq[2]); + isa_irq = qemu_allocate_irqs(malta_isa_irq_handler, malta_isa, 16); /* Northbridge */ - pci_bus = gt64120_register(i8259); + pci_bus = gt64120_register(isa_irq); /* Southbridge */ ide_drive_get(hd, MAX_IDE_BUS); piix4_devfn = piix4_init(pci_bus, 80); + + /* Interrupt controller */ + /* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ + malta_isa->i8259 = i8259 = i8259_init(env->irq[2]); + isa_bus_irqs(i8259); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);