diff mbox series

[RFC,4/6] hw/ppc/pnv: initialize and realize homer/occ common area

Message ID 20190807071445.4109-5-bala24@linux.ibm.com
State New
Headers show
Series Enhancing Qemu MMIO emulation with scripting interface | expand

Commit Message

Balamuruhan S Aug. 7, 2019, 7:14 a.m. UTC
homer and occ common area region base address are initialized
to create device tree and realized to map the address with
mmio callbacks during `pnv_chip_realize()`.

`SysBusNum` enum is introduced to set sysbus for XSCOM, ICP,
HOMER and OCC appropriately and chip_num to initialize and
retrieve base address + size contiguously on a PowerNV with
multichip boot.

Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
---
 hw/ppc/pnv.c         | 49 +++++++++++++++++++++++++++++++++++++++++++++----
 include/hw/ppc/pnv.h |  1 +
 2 files changed, 46 insertions(+), 4 deletions(-)

Comments

Cédric Le Goater Aug. 7, 2019, 7:59 a.m. UTC | #1
On 07/08/2019 09:14, Balamuruhan S wrote:
> homer and occ common area region base address are initialized
> to create device tree and realized to map the address with
> mmio callbacks during `pnv_chip_realize()`.
> 
> `SysBusNum` enum is introduced to set sysbus for XSCOM, ICP,
> HOMER and OCC appropriately and chip_num to initialize and
> retrieve base address + size contiguously on a PowerNV with
> multichip boot.

Can't you use the chip_id ? 

> 
> Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
> ---
>  hw/ppc/pnv.c         | 49 +++++++++++++++++++++++++++++++++++++++++++++----
>  include/hw/ppc/pnv.h |  1 +
>  2 files changed, 46 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index bd4531c822..f6e56e915d 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -675,6 +675,7 @@ static void pnv_init(MachineState *machine)
>          Object *chip = object_new(chip_typename);
>  
>          pnv->chips[i] = PNV_CHIP(chip);
> +        PNV_CHIP(chip)->chip_num = i;
>
>          /* TODO: put all the memory in one node on chip 0 until we find a
>           * way to specify different ranges for each chip
> @@ -824,18 +825,20 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
>   {
>      PnvChip *chip = PNV_CHIP(chip8);
>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> +    SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
>      const char *typename = pnv_chip_core_typename(chip);
>      size_t typesize = object_type_get_instance_size(typename);
>      int i, j;
>      char *name;
>      XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
>  
> +    sbd->num_mmio = PNV_ICP_SYSBUS;

OK. I think I know why you want this but it probably means that you need 
a new PnvHomer model and that you should use PnvOCC instead. 

>      name = g_strdup_printf("icp-%x", chip->chip_id);
>      memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE);
> -    sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio);
> +    sysbus_init_mmio(sbd, &chip8->icp_mmio);
>      g_free(name);
>  
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip));
> +    sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip));
>  
>      /* Map the ICP registers for each thread */
>      for (i = 0; i < chip->nr_cores; i++) {
> @@ -866,7 +869,26 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
>          error_propagate(errp, local_err);
>          return;
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> +                                   PNV_XSCOM_BASE(chip));
> +
> +    /* homer */
> +    pnv_homer_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> +                    PNV_HOMER_BASE(chip));
> +    /* occ common area */
> +    pnv_occ_common_area_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> +                    PNV_OCC_COMMON_AREA(chip));
>  
>      pcc->parent_realize(dev, &local_err);
>      if (local_err) {
> @@ -1035,7 +1057,26 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>          error_propagate(errp, local_err);
>          return;
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> +                    PNV9_XSCOM_BASE(chip));
> +
> +    /* homer */
> +    pnv_homer_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> +                    PNV9_HOMER_BASE(chip));
> +
> +    /* occ common area */
> +    pnv_occ_common_area_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> +                    PNV9_OCC_COMMON_AREA(chip));
>  
>      pcc->parent_realize(dev, &local_err);
>      if (local_err) {
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index 6464e32892..dea6772988 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -57,6 +57,7 @@ typedef struct PnvChip {
>  
>      /*< public >*/
>      uint32_t     chip_id;
> +    uint32_t     chip_num;
>      uint64_t     ram_start;
>      uint64_t     ram_size;
>  
>
Balamuruhan S Aug. 7, 2019, 10:12 a.m. UTC | #2
On Wed, Aug 07, 2019 at 09:59:26AM +0200, Cédric Le Goater wrote:
> On 07/08/2019 09:14, Balamuruhan S wrote:
> > homer and occ common area region base address are initialized
> > to create device tree and realized to map the address with
> > mmio callbacks during `pnv_chip_realize()`.
> > 
> > `SysBusNum` enum is introduced to set sysbus for XSCOM, ICP,
> > HOMER and OCC appropriately and chip_num to initialize and
> > retrieve base address + size contiguously on a PowerNV with
> > multichip boot.
> 
> Can't you use the chip_id ? 

if the chip_id is contiguous always we can use it. I was not
sure about it.

> 
> > 
> > Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
> > ---
> >  hw/ppc/pnv.c         | 49 +++++++++++++++++++++++++++++++++++++++++++++----
> >  include/hw/ppc/pnv.h |  1 +
> >  2 files changed, 46 insertions(+), 4 deletions(-)
> > 
> > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> > index bd4531c822..f6e56e915d 100644
> > --- a/hw/ppc/pnv.c
> > +++ b/hw/ppc/pnv.c
> > @@ -675,6 +675,7 @@ static void pnv_init(MachineState *machine)
> >          Object *chip = object_new(chip_typename);
> >  
> >          pnv->chips[i] = PNV_CHIP(chip);
> > +        PNV_CHIP(chip)->chip_num = i;
> >
> >          /* TODO: put all the memory in one node on chip 0 until we find a
> >           * way to specify different ranges for each chip
> > @@ -824,18 +825,20 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
> >   {
> >      PnvChip *chip = PNV_CHIP(chip8);
> >      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> > +    SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
> >      const char *typename = pnv_chip_core_typename(chip);
> >      size_t typesize = object_type_get_instance_size(typename);
> >      int i, j;
> >      char *name;
> >      XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
> >  
> > +    sbd->num_mmio = PNV_ICP_SYSBUS;
> 
> OK. I think I know why you want this but it probably means that you need 
> a new PnvHomer model and that you should use PnvOCC instead. 

okay, I will have to work on it.

> 
> >      name = g_strdup_printf("icp-%x", chip->chip_id);
> >      memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE);
> > -    sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio);
> > +    sysbus_init_mmio(sbd, &chip8->icp_mmio);
> >      g_free(name);
> >  
> > -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip));
> > +    sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip));
> >  
> >      /* Map the ICP registers for each thread */
> >      for (i = 0; i < chip->nr_cores; i++) {
> > @@ -866,7 +869,26 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
> >          error_propagate(errp, local_err);
> >          return;
> >      }
> > -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> > +                                   PNV_XSCOM_BASE(chip));
> > +
> > +    /* homer */
> > +    pnv_homer_realize(chip, &local_err);
> > +    if (local_err) {
> > +        error_propagate(errp, local_err);
> > +        return;
> > +    }
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> > +                    PNV_HOMER_BASE(chip));
> > +    /* occ common area */
> > +    pnv_occ_common_area_realize(chip, &local_err);
> > +    if (local_err) {
> > +        error_propagate(errp, local_err);
> > +        return;
> > +    }
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> > +                    PNV_OCC_COMMON_AREA(chip));
> >  
> >      pcc->parent_realize(dev, &local_err);
> >      if (local_err) {
> > @@ -1035,7 +1057,26 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
> >          error_propagate(errp, local_err);
> >          return;
> >      }
> > -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> > +                    PNV9_XSCOM_BASE(chip));
> > +
> > +    /* homer */
> > +    pnv_homer_realize(chip, &local_err);
> > +    if (local_err) {
> > +        error_propagate(errp, local_err);
> > +        return;
> > +    }
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> > +                    PNV9_HOMER_BASE(chip));
> > +
> > +    /* occ common area */
> > +    pnv_occ_common_area_realize(chip, &local_err);
> > +    if (local_err) {
> > +        error_propagate(errp, local_err);
> > +        return;
> > +    }
> > +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> > +                    PNV9_OCC_COMMON_AREA(chip));
> >  
> >      pcc->parent_realize(dev, &local_err);
> >      if (local_err) {
> > diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> > index 6464e32892..dea6772988 100644
> > --- a/include/hw/ppc/pnv.h
> > +++ b/include/hw/ppc/pnv.h
> > @@ -57,6 +57,7 @@ typedef struct PnvChip {
> >  
> >      /*< public >*/
> >      uint32_t     chip_id;
> > +    uint32_t     chip_num;
> >      uint64_t     ram_start;
> >      uint64_t     ram_size;
> >  
> > 
>
Cédric Le Goater Aug. 8, 2019, 8:46 a.m. UTC | #3
On 07/08/2019 12:12, Balamuruhan S wrote:
> On Wed, Aug 07, 2019 at 09:59:26AM +0200, Cédric Le Goater wrote:
>> On 07/08/2019 09:14, Balamuruhan S wrote:
>>> homer and occ common area region base address are initialized
>>> to create device tree and realized to map the address with
>>> mmio callbacks during `pnv_chip_realize()`.
>>>
>>> `SysBusNum` enum is introduced to set sysbus for XSCOM, ICP,
>>> HOMER and OCC appropriately and chip_num to initialize and
>>> retrieve base address + size contiguously on a PowerNV with
>>> multichip boot.
>>
>> Can't you use the chip_id ? 
> 
> if the chip_id is contiguous always we can use it. I was not
> sure about it.

When I introduced PNV_CHIP_HWID(), I made it follow the 2S tuletas
numbers, which are DCMs. So you get 0x0, 0x1, 0x10, 0x11. 

PNV_CHIP_INDEX() is to be used for MMIO addresses. We can fix that 
if there is a problem. 

C.

>>
>>>
>>> Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
>>> ---
>>>  hw/ppc/pnv.c         | 49 +++++++++++++++++++++++++++++++++++++++++++++----
>>>  include/hw/ppc/pnv.h |  1 +
>>>  2 files changed, 46 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
>>> index bd4531c822..f6e56e915d 100644
>>> --- a/hw/ppc/pnv.c
>>> +++ b/hw/ppc/pnv.c
>>> @@ -675,6 +675,7 @@ static void pnv_init(MachineState *machine)
>>>          Object *chip = object_new(chip_typename);
>>>  
>>>          pnv->chips[i] = PNV_CHIP(chip);
>>> +        PNV_CHIP(chip)->chip_num = i;
>>>
>>>          /* TODO: put all the memory in one node on chip 0 until we find a
>>>           * way to specify different ranges for each chip
>>> @@ -824,18 +825,20 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
>>>   {
>>>      PnvChip *chip = PNV_CHIP(chip8);
>>>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
>>> +    SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
>>>      const char *typename = pnv_chip_core_typename(chip);
>>>      size_t typesize = object_type_get_instance_size(typename);
>>>      int i, j;
>>>      char *name;
>>>      XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
>>>  
>>> +    sbd->num_mmio = PNV_ICP_SYSBUS;
>>
>> OK. I think I know why you want this but it probably means that you need 
>> a new PnvHomer model and that you should use PnvOCC instead. 
> 
> okay, I will have to work on it.
> 
>>
>>>      name = g_strdup_printf("icp-%x", chip->chip_id);
>>>      memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE);
>>> -    sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio);
>>> +    sysbus_init_mmio(sbd, &chip8->icp_mmio);
>>>      g_free(name);
>>>  
>>> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip));
>>> +    sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip));
>>>  
>>>      /* Map the ICP registers for each thread */
>>>      for (i = 0; i < chip->nr_cores; i++) {
>>> @@ -866,7 +869,26 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
>>>          error_propagate(errp, local_err);
>>>          return;
>>>      }
>>> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
>>> +                                   PNV_XSCOM_BASE(chip));
>>> +
>>> +    /* homer */
>>> +    pnv_homer_realize(chip, &local_err);
>>> +    if (local_err) {
>>> +        error_propagate(errp, local_err);
>>> +        return;
>>> +    }
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
>>> +                    PNV_HOMER_BASE(chip));
>>> +    /* occ common area */
>>> +    pnv_occ_common_area_realize(chip, &local_err);
>>> +    if (local_err) {
>>> +        error_propagate(errp, local_err);
>>> +        return;
>>> +    }
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
>>> +                    PNV_OCC_COMMON_AREA(chip));
>>>  
>>>      pcc->parent_realize(dev, &local_err);
>>>      if (local_err) {
>>> @@ -1035,7 +1057,26 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>>>          error_propagate(errp, local_err);
>>>          return;
>>>      }
>>> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
>>> +                    PNV9_XSCOM_BASE(chip));
>>> +
>>> +    /* homer */
>>> +    pnv_homer_realize(chip, &local_err);
>>> +    if (local_err) {
>>> +        error_propagate(errp, local_err);
>>> +        return;
>>> +    }
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
>>> +                    PNV9_HOMER_BASE(chip));
>>> +
>>> +    /* occ common area */
>>> +    pnv_occ_common_area_realize(chip, &local_err);
>>> +    if (local_err) {
>>> +        error_propagate(errp, local_err);
>>> +        return;
>>> +    }
>>> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
>>> +                    PNV9_OCC_COMMON_AREA(chip));
>>>  
>>>      pcc->parent_realize(dev, &local_err);
>>>      if (local_err) {
>>> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
>>> index 6464e32892..dea6772988 100644
>>> --- a/include/hw/ppc/pnv.h
>>> +++ b/include/hw/ppc/pnv.h
>>> @@ -57,6 +57,7 @@ typedef struct PnvChip {
>>>  
>>>      /*< public >*/
>>>      uint32_t     chip_id;
>>> +    uint32_t     chip_num;
>>>      uint64_t     ram_start;
>>>      uint64_t     ram_size;
>>>  
>>>
>>
>
David Gibson Aug. 9, 2019, 4:45 a.m. UTC | #4
On Wed, Aug 07, 2019 at 12:44:43PM +0530, Balamuruhan S wrote:
> homer and occ common area region base address are initialized
> to create device tree and realized to map the address with
> mmio callbacks during `pnv_chip_realize()`.
> 
> `SysBusNum` enum is introduced to set sysbus for XSCOM, ICP,
> HOMER and OCC appropriately and chip_num to initialize and
> retrieve base address + size contiguously on a PowerNV with
> multichip boot.

Same comments here as on the previous patch - I don't think this
belongs in the series with the scripting extensions.

> 
> Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
> ---
>  hw/ppc/pnv.c         | 49 +++++++++++++++++++++++++++++++++++++++++++++----
>  include/hw/ppc/pnv.h |  1 +
>  2 files changed, 46 insertions(+), 4 deletions(-)
> 
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index bd4531c822..f6e56e915d 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -675,6 +675,7 @@ static void pnv_init(MachineState *machine)
>          Object *chip = object_new(chip_typename);
>  
>          pnv->chips[i] = PNV_CHIP(chip);
> +        PNV_CHIP(chip)->chip_num = i;
>  
>          /* TODO: put all the memory in one node on chip 0 until we find a
>           * way to specify different ranges for each chip
> @@ -824,18 +825,20 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
>   {
>      PnvChip *chip = PNV_CHIP(chip8);
>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
> +    SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
>      const char *typename = pnv_chip_core_typename(chip);
>      size_t typesize = object_type_get_instance_size(typename);
>      int i, j;
>      char *name;
>      XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
>  
> +    sbd->num_mmio = PNV_ICP_SYSBUS;
>      name = g_strdup_printf("icp-%x", chip->chip_id);
>      memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE);
> -    sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio);
> +    sysbus_init_mmio(sbd, &chip8->icp_mmio);
>      g_free(name);
>  
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip));
> +    sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip));
>  
>      /* Map the ICP registers for each thread */
>      for (i = 0; i < chip->nr_cores; i++) {
> @@ -866,7 +869,26 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
>          error_propagate(errp, local_err);
>          return;
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> +                                   PNV_XSCOM_BASE(chip));
> +
> +    /* homer */
> +    pnv_homer_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> +                    PNV_HOMER_BASE(chip));
> +
> +    /* occ common area */
> +    pnv_occ_common_area_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> +                    PNV_OCC_COMMON_AREA(chip));
>  
>      pcc->parent_realize(dev, &local_err);
>      if (local_err) {
> @@ -1035,7 +1057,26 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
>          error_propagate(errp, local_err);
>          return;
>      }
> -    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
> +                    PNV9_XSCOM_BASE(chip));
> +
> +    /* homer */
> +    pnv_homer_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
> +                    PNV9_HOMER_BASE(chip));
> +
> +    /* occ common area */
> +    pnv_occ_common_area_realize(chip, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
> +                    PNV9_OCC_COMMON_AREA(chip));
>  
>      pcc->parent_realize(dev, &local_err);
>      if (local_err) {
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index 6464e32892..dea6772988 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -57,6 +57,7 @@ typedef struct PnvChip {
>  
>      /*< public >*/
>      uint32_t     chip_id;
> +    uint32_t     chip_num;
>      uint64_t     ram_start;
>      uint64_t     ram_size;
>
diff mbox series

Patch

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index bd4531c822..f6e56e915d 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -675,6 +675,7 @@  static void pnv_init(MachineState *machine)
         Object *chip = object_new(chip_typename);
 
         pnv->chips[i] = PNV_CHIP(chip);
+        PNV_CHIP(chip)->chip_num = i;
 
         /* TODO: put all the memory in one node on chip 0 until we find a
          * way to specify different ranges for each chip
@@ -824,18 +825,20 @@  static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
  {
     PnvChip *chip = PNV_CHIP(chip8);
     PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(chip);
     const char *typename = pnv_chip_core_typename(chip);
     size_t typesize = object_type_get_instance_size(typename);
     int i, j;
     char *name;
     XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
 
+    sbd->num_mmio = PNV_ICP_SYSBUS;
     name = g_strdup_printf("icp-%x", chip->chip_id);
     memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE);
-    sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio);
+    sysbus_init_mmio(sbd, &chip8->icp_mmio);
     g_free(name);
 
-    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip));
+    sysbus_mmio_map(sbd, PNV_ICP_SYSBUS, PNV_ICP_BASE(chip));
 
     /* Map the ICP registers for each thread */
     for (i = 0; i < chip->nr_cores; i++) {
@@ -866,7 +869,26 @@  static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
         error_propagate(errp, local_err);
         return;
     }
-    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip));
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
+                                   PNV_XSCOM_BASE(chip));
+
+    /* homer */
+    pnv_homer_realize(chip, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
+                    PNV_HOMER_BASE(chip));
+
+    /* occ common area */
+    pnv_occ_common_area_realize(chip, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
+                    PNV_OCC_COMMON_AREA(chip));
 
     pcc->parent_realize(dev, &local_err);
     if (local_err) {
@@ -1035,7 +1057,26 @@  static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
         error_propagate(errp, local_err);
         return;
     }
-    sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip));
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_XSCOM_SYSBUS,
+                    PNV9_XSCOM_BASE(chip));
+
+    /* homer */
+    pnv_homer_realize(chip, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_HOMER_SYSBUS,
+                    PNV9_HOMER_BASE(chip));
+
+    /* occ common area */
+    pnv_occ_common_area_realize(chip, &local_err);
+    if (local_err) {
+        error_propagate(errp, local_err);
+        return;
+    }
+    sysbus_mmio_map(SYS_BUS_DEVICE(chip), PNV_OCC_COMMON_AREA_SYSBUS,
+                    PNV9_OCC_COMMON_AREA(chip));
 
     pcc->parent_realize(dev, &local_err);
     if (local_err) {
diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 6464e32892..dea6772988 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -57,6 +57,7 @@  typedef struct PnvChip {
 
     /*< public >*/
     uint32_t     chip_id;
+    uint32_t     chip_num;
     uint64_t     ram_start;
     uint64_t     ram_size;