From patchwork Mon Sep 12 04:06:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 114282 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 63EACB726C for ; Mon, 12 Sep 2011 14:08:47 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D9C228336; Mon, 12 Sep 2011 06:08:36 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Mw0-u780-Ead; Mon, 12 Sep 2011 06:08:35 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5FFE528338; Mon, 12 Sep 2011 06:07:33 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B73C0282DE for ; Mon, 12 Sep 2011 06:07:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IFftTDk0WUmP for ; Mon, 12 Sep 2011 06:07:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f44.google.com (mail-fx0-f44.google.com [209.85.161.44]) by theia.denx.de (Postfix) with ESMTPS id A96EF28325 for ; Mon, 12 Sep 2011 06:07:10 +0200 (CEST) Received: by mail-fx0-f44.google.com with SMTP id 18so572030fxd.3 for ; Sun, 11 Sep 2011 21:07:10 -0700 (PDT) Received: by 10.223.41.28 with SMTP id m28mr788889fae.134.1315800430553; Sun, 11 Sep 2011 21:07:10 -0700 (PDT) Received: from mashiro.kolej.mff.cuni.cz (vasut.kolej.mff.cuni.cz [78.128.198.52]) by mx.google.com with ESMTPS id a1sm8062144fae.23.2011.09.11.21.07.08 (version=SSLv3 cipher=OTHER); Sun, 11 Sep 2011 21:07:09 -0700 (PDT) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 12 Sep 2011 06:06:41 +0200 Message-Id: <1315800409-19876-8-git-send-email-marek.vasut@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1315800409-19876-1-git-send-email-marek.vasut@gmail.com> References: <1315800409-19876-1-git-send-email-marek.vasut@gmail.com> Subject: [U-Boot] [PATCH 07/15] iMX28: Add SPI driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Wolfgang Denk Cc: Detlev Zundel --- drivers/spi/Makefile | 1 + drivers/spi/mxs_spi.c | 172 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 173 insertions(+), 0 deletions(-) create mode 100644 drivers/spi/mxs_spi.c diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 96c9642..9a0c475 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -36,6 +36,7 @@ COBJS-$(CONFIG_KIRKWOOD_SPI) += kirkwood_spi.o COBJS-$(CONFIG_MPC52XX_SPI) += mpc52xx_spi.o COBJS-$(CONFIG_MPC8XXX_SPI) += mpc8xxx_spi.o COBJS-$(CONFIG_MXC_SPI) += mxc_spi.o +COBJS-$(CONFIG_MXS_SPI) += mxs_spi.o COBJS-$(CONFIG_OC_TINY_SPI) += oc_tiny_spi.o COBJS-$(CONFIG_OMAP3_SPI) += omap3_spi.o COBJS-$(CONFIG_SOFT_SPI) += soft_spi.o diff --git a/drivers/spi/mxs_spi.c b/drivers/spi/mxs_spi.c new file mode 100644 index 0000000..f0d60d7 --- /dev/null +++ b/drivers/spi/mxs_spi.c @@ -0,0 +1,172 @@ +/* + * Freescale i.MX28 SPI driver + * + * Copyright (C) 2011 Marek Vasut + * on behalf of DENX Software Engineering GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * NOTE: This driver only supports the SPI-controller chipselects, + * GPIO driven chipselects are not supported. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define MXS_SPI_MAX_TIMEOUT 1000000 + +static inline struct mx28_ssp_regs *to_mxs_regs(struct spi_slave *slave) +{ + return (struct mx28_ssp_regs *)(MXS_SSP0_BASE + (slave->bus * 0x2000)); +} + +void spi_init(void) +{ +} + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs, + unsigned int max_hz, unsigned int mode) +{ + struct spi_slave *slave; + struct mx28_ssp_regs *ssp_regs; + uint32_t reg = 0; + + if (bus > 3) { + printf("MXS SPI: Max bus number is 3\n"); + return NULL; + } + + slave = malloc(sizeof(struct spi_slave)); + if (!slave) + return NULL; + + slave->bus = bus; + slave->cs = cs; + + ssp_regs = to_mxs_regs(slave); + + mx28_reset_block(&ssp_regs->hw_ssp_ctrl0_reg); + + writel(SSP_CTRL0_BUS_WIDTH_ONE_BIT, &ssp_regs->hw_ssp_ctrl0); + + reg = SSP_CTRL1_SSP_MODE_SPI | SSP_CTRL1_WORD_LENGTH_EIGHT_BITS; + reg |= (mode & SPI_CPOL) ? SSP_CTRL1_POLARITY : 0; + reg |= (mode & SPI_CPHA) ? SSP_CTRL1_PHASE : 0; + writel(reg, &ssp_regs->hw_ssp_ctrl1); + + writel(0, &ssp_regs->hw_ssp_cmd0); + + mx28_set_ssp_busclock(bus, max_hz / 1000); + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + free(slave); +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ +} + +void mxs_spi_start_xfer(struct spi_slave *slave) +{ + struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave); + writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_set); + writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_clr); +} + +void mxs_spi_end_xfer(struct spi_slave *slave) +{ + struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave); + writel(SSP_CTRL0_LOCK_CS, &ssp_regs->hw_ssp_ctrl0_clr); + writel(SSP_CTRL0_IGNORE_CRC, &ssp_regs->hw_ssp_ctrl0_set); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct mx28_ssp_regs *ssp_regs = to_mxs_regs(slave); + int len = bitlen / 8; + const char *tx = dout; + char *rx = din; + + if (bitlen == 0) + return 0; + + if (!rx && !tx) + return 0; + + if (flags & SPI_XFER_BEGIN) + mxs_spi_start_xfer(slave); + + while (len--) { + /* We transfer 1 byte */ + writel(1, &ssp_regs->hw_ssp_xfer_size); + + if ((flags & SPI_XFER_END) && !len) + mxs_spi_end_xfer(slave); + + if (tx) + writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_clr); + else + writel(SSP_CTRL0_READ, &ssp_regs->hw_ssp_ctrl0_set); + + writel(SSP_CTRL0_RUN, &ssp_regs->hw_ssp_ctrl0_set); + + if (mx28_wait_mask_set(&ssp_regs->hw_ssp_ctrl0_reg, + SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { + printf("MXS SPI: Timeout waiting for start\n"); + return -1; + } + + if (tx) + writel(*tx++, &ssp_regs->hw_ssp_data); + + writel(SSP_CTRL0_DATA_XFER, &ssp_regs->hw_ssp_ctrl0_set); + + if (rx) { + if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_status_reg, + SSP_STATUS_FIFO_EMPTY, MXS_SPI_MAX_TIMEOUT)) { + printf("MXS SPI: Timeout waiting for data\n"); + return -1; + } + + *rx = readl(&ssp_regs->hw_ssp_data); + rx++; + } + + if (mx28_wait_mask_clr(&ssp_regs->hw_ssp_ctrl0_reg, + SSP_CTRL0_RUN, MXS_SPI_MAX_TIMEOUT)) { + printf("MXS SPI: Timeout waiting for finish\n"); + return -1; + } + } + + return 0; +}