From patchwork Mon Sep 12 04:06:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 114280 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C2B62B725C for ; Mon, 12 Sep 2011 14:08:25 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5F70328390; Mon, 12 Sep 2011 06:08:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Xgvf2dbUD8fN; Mon, 12 Sep 2011 06:08:17 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 26D8B28332; Mon, 12 Sep 2011 06:07:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0DC2E282DE for ; Mon, 12 Sep 2011 06:07:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fJ5b88eHDny7 for ; Mon, 12 Sep 2011 06:07:25 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f44.google.com (mail-fx0-f44.google.com [209.85.161.44]) by theia.denx.de (Postfix) with ESMTPS id 1614D2831F for ; Mon, 12 Sep 2011 06:07:09 +0200 (CEST) Received: by mail-fx0-f44.google.com with SMTP id 18so572030fxd.3 for ; Sun, 11 Sep 2011 21:07:09 -0700 (PDT) Received: by 10.223.54.134 with SMTP id q6mr1113667fag.130.1315800428934; Sun, 11 Sep 2011 21:07:08 -0700 (PDT) Received: from mashiro.kolej.mff.cuni.cz (vasut.kolej.mff.cuni.cz [78.128.198.52]) by mx.google.com with ESMTPS id a1sm8062144fae.23.2011.09.11.21.07.06 (version=SSLv3 cipher=OTHER); Sun, 11 Sep 2011 21:07:07 -0700 (PDT) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 12 Sep 2011 06:06:40 +0200 Message-Id: <1315800409-19876-7-git-send-email-marek.vasut@gmail.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1315800409-19876-1-git-send-email-marek.vasut@gmail.com> References: <1315800409-19876-1-git-send-email-marek.vasut@gmail.com> Subject: [U-Boot] [PATCH 06/15] iMX28: Add GPIO control X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Marek Vasut Cc: Stefano Babic Cc: Wolfgang Denk Cc: Detlev Zundel Acked-by: Stefano Babic --- arch/arm/cpu/arm926ejs/mx28/mx28.c | 6 ++ arch/arm/include/asm/arch-mx28/gpio.h | 32 ++++++++ drivers/gpio/Makefile | 1 + drivers/gpio/mxs_gpio.c | 136 +++++++++++++++++++++++++++++++++ 4 files changed, 175 insertions(+), 0 deletions(-) create mode 100644 arch/arm/include/asm/arch-mx28/gpio.h create mode 100644 drivers/gpio/mxs_gpio.c diff --git a/arch/arm/cpu/arm926ejs/mx28/mx28.c b/arch/arm/cpu/arm926ejs/mx28/mx28.c index 58ac9ae..d53ce99 100644 --- a/arch/arm/cpu/arm926ejs/mx28/mx28.c +++ b/arch/arm/cpu/arm926ejs/mx28/mx28.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -135,6 +136,11 @@ int arch_cpu_init(void) udelay(1000); + /* + * Configure GPIO unit + */ + mxs_gpio_init(); + return 0; } #endif diff --git a/arch/arm/include/asm/arch-mx28/gpio.h b/arch/arm/include/asm/arch-mx28/gpio.h new file mode 100644 index 0000000..be1c944 --- /dev/null +++ b/arch/arm/include/asm/arch-mx28/gpio.h @@ -0,0 +1,32 @@ +/* + * Freescale i.MX28 GPIO + * + * Copyright (C) 2011 Marek Vasut + * on behalf of DENX Software Engineering GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +#ifndef __MX28_GPIO_H__ +#define __MX28_GPIO_H__ + +#ifdef CONFIG_MXS_GPIO +void mxs_gpio_init(void); +#else +inline void mxs_gpio_init(void) {} +#endif + +#endif /* __MX28_GPIO_H__ */ diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 62ec97d..4332418 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -29,6 +29,7 @@ COBJS-$(CONFIG_AT91_GPIO) += at91_gpio.o COBJS-$(CONFIG_KIRKWOOD_GPIO) += kw_gpio.o COBJS-$(CONFIG_MARVELL_MFP) += mvmfp.o COBJS-$(CONFIG_MXC_GPIO) += mxc_gpio.o +COBJS-$(CONFIG_MXS_GPIO) += mxs_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_S5P) += s5p_gpio.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o diff --git a/drivers/gpio/mxs_gpio.c b/drivers/gpio/mxs_gpio.c new file mode 100644 index 0000000..b7e9591 --- /dev/null +++ b/drivers/gpio/mxs_gpio.c @@ -0,0 +1,136 @@ +/* + * Freescale i.MX28 GPIO control code + * + * Copyright (C) 2011 Marek Vasut + * on behalf of DENX Software Engineering GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include + +#if defined(CONFIG_MX23) +#define PINCTRL_BANKS 3 +#define PINCTRL_DOUT(n) (0x0500 + ((n) * 0x10)) +#define PINCTRL_DIN(n) (0x0600 + ((n) * 0x10)) +#define PINCTRL_DOE(n) (0x0700 + ((n) * 0x10)) +#define PINCTRL_PIN2IRQ(n) (0x0800 + ((n) * 0x10)) +#define PINCTRL_IRQEN(n) (0x0900 + ((n) * 0x10)) +#define PINCTRL_IRQSTAT(n) (0x0c00 + ((n) * 0x10)) +#elif defined(CONFIG_MX28) +#define PINCTRL_BANKS 5 +#define PINCTRL_DOUT(n) (0x0700 + ((n) * 0x10)) +#define PINCTRL_DIN(n) (0x0900 + ((n) * 0x10)) +#define PINCTRL_DOE(n) (0x0b00 + ((n) * 0x10)) +#define PINCTRL_PIN2IRQ(n) (0x1000 + ((n) * 0x10)) +#define PINCTRL_IRQEN(n) (0x1100 + ((n) * 0x10)) +#define PINCTRL_IRQSTAT(n) (0x1400 + ((n) * 0x10)) +#else +#error "Please select CONFIG_MX23 or CONFIG_MX28" +#endif + +#define GPIO_INT_FALL_EDGE 0x0 +#define GPIO_INT_LOW_LEV 0x1 +#define GPIO_INT_RISE_EDGE 0x2 +#define GPIO_INT_HIGH_LEV 0x3 +#define GPIO_INT_LEV_MASK (1 << 0) +#define GPIO_INT_POL_MASK (1 << 1) + +void mxs_gpio_init(void) +{ + int i; + + for (i = 0; i < PINCTRL_BANKS; i++) { + writel(0, MXS_PINCTRL_BASE + PINCTRL_PIN2IRQ(i)); + writel(0, MXS_PINCTRL_BASE + PINCTRL_IRQEN(i)); + /* Use SCT address here to clear the IRQSTAT bits */ + writel(0xffffffff, MXS_PINCTRL_BASE + PINCTRL_IRQSTAT(i) + 8); + } +} + +int gpio_get_value(int gp) +{ + uint32_t bank = PAD_BANK(gp); + uint32_t offset = PINCTRL_DIN(bank); + struct mx28_register *reg = + (struct mx28_register *)(MXS_PINCTRL_BASE + offset); + + return (readl(®->reg) >> PAD_PIN(gp)) & 1; +} + +void gpio_set_value(int gp, int value) +{ + uint32_t bank = PAD_BANK(gp); + uint32_t offset = PINCTRL_DOUT(bank); + struct mx28_register *reg = + (struct mx28_register *)(MXS_PINCTRL_BASE + offset); + + if (value) + writel(1 << PAD_PIN(gp), ®->reg_set); + else + writel(1 << PAD_PIN(gp), ®->reg_clr); +} + +int gpio_direction_input(int gp) +{ + uint32_t bank = PAD_BANK(gp); + uint32_t offset = PINCTRL_DOE(bank); + struct mx28_register *reg = + (struct mx28_register *)(MXS_PINCTRL_BASE + offset); + + writel(1 << PAD_PIN(gp), ®->reg_clr); + + return 0; +} + +int gpio_direction_output(int gp, int value) +{ + uint32_t bank = PAD_BANK(gp); + uint32_t offset = PINCTRL_DOE(bank); + struct mx28_register *reg = + (struct mx28_register *)(MXS_PINCTRL_BASE + offset); + + writel(1 << PAD_PIN(gp), ®->reg_set); + + gpio_set_value(gp, value); + + return 0; +} + +int gpio_request(int gp, const char *label) +{ + if (PAD_BANK(gp) > PINCTRL_BANKS) + return -EINVAL; + + return 0; +} + +void gpio_free(int gp) +{ +} + +void gpio_toggle_value(int gp) +{ + gpio_set_value(gp, !gpio_get_value(gp)); +}