Patchwork KVM: emulate lapic tsc deadline timer for hvm

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Submitter Liu, Jinsong
Date Sept. 9, 2011, 6:47 p.m.
Message ID <BC00F5384FCFC9499AF06F92E8B78A9E24C6E20C7E@shsmsx502.ccr.corp.intel.com>
Download mbox | patch
Permalink /patch/114120/
State New
Headers show

Comments

Liu, Jinsong - Sept. 9, 2011, 6:47 p.m.
>> 
>> My question is, which kvm_get_msrs/kvm_put_msrs routine be used by
>> live migration, the routine in target-i386/kvm.c, or in
>> kvm/libkvm/libkvm-x86.c? They both have ioctl
>> KVM_GET_MSR_INDEX_LIST/ KVM_GET_MSRS/ KVM_SET_MSRS, but I'm not
>> clear their purpose/usage difference.    
> 
> kvm_get_msrs/kvm_put_msrs in target-i386/kvm.c. kvm/ directory is
> dead. 


Thanks to make me clear. Add it to qemu like:

=================


Thanks,
Jinsong

Patch

================

diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 935d08a..62ff73c 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -283,6 +283,7 @@ 
 #define MSR_IA32_APICBASE_BSP           (1<<8)
 #define MSR_IA32_APICBASE_ENABLE        (1<<11)
 #define MSR_IA32_APICBASE_BASE          (0xfffff<<12)
+#define MSR_IA32_TSCDEADLINE            0x6e0

 #define MSR_MTRRcap                    0xfe
 #define MSR_MTRRcap_VCNT               8
@@ -687,6 +688,7 @@  typedef struct CPUX86State {
     uint64_t async_pf_en_msr;

     uint64_t tsc;
+    uint64_t tsc_deadline;

     uint64_t mcg_status;

diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index aa843f0..206fcad 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -59,6 +59,7 @@  const KVMCapabilityInfo kvm_arch_required_capabilities[] = {

 static bool has_msr_star;
 static bool has_msr_hsave_pa;
+static bool has_msr_tsc_deadline;
 static bool has_msr_async_pf_en;
 static int lm_capable_kernel;

@@ -571,6 +572,10 @@  static int kvm_get_supported_msrs(KVMState *s)
                     has_msr_hsave_pa = true;
                     continue;
                 }
+                if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
+                    has_msr_tsc_deadline = true;
+                    continue;
+                }
             }
         }

@@ -899,6 +904,9 @@  static int kvm_put_msrs(CPUState *env, int level)
     if (has_msr_hsave_pa) {
         kvm_msr_entry_set(&msrs[n++], MSR_VM_HSAVE_PA, env->vm_hsave);
     }
+    if (has_msr_tsc_deadline) {
+        kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
+    }
 #ifdef TARGET_X86_64
     if (lm_capable_kernel) {
         kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
@@ -1145,6 +1153,9 @@  static int kvm_get_msrs(CPUState *env)
     if (has_msr_hsave_pa) {
         msrs[n++].index = MSR_VM_HSAVE_PA;
     }
+    if (has_msr_tsc_deadline) {
+        msrs[n++].index = MSR_IA32_TSCDEADLINE;
+    }

     if (!env->tsc_valid) {
         msrs[n++].index = MSR_IA32_TSC;
@@ -1213,6 +1224,9 @@  static int kvm_get_msrs(CPUState *env)
         case MSR_IA32_TSC:
             env->tsc = msrs[i].data;
             break;
+        case MSR_IA32_TSCDEADLINE:
+            env->tsc_deadline = msrs[i].data;
+            break;
         case MSR_VM_HSAVE_PA:
             env->vm_hsave = msrs[i].data;
             break;