hw/phb4: Prevent register accesses when in reset
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Message ID 20190802080003.9759-1-oohall@gmail.com
State Accepted
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  • hw/phb4: Prevent register accesses when in reset
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snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (2554cac82da530acfcb1a575c571e760de92dde4)

Commit Message

Oliver O'Halloran Aug. 2, 2019, 8 a.m. UTC
While the the ETU is in reset we cannot access any of the PHB registers.
If a PHB register is accessed via the XSCOM indirect interface then
we'll cause an ETU reset error which may prevent the PHB from being
re-initialised once the reset is lifted.

Prevent register accesses while in reset by adding a flag that is set
while the ETU reset bit is high and checking that flag in the XSCOM
(ASB) backdoor register access path.

Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
---
 hw/phb4.c      | 10 ++++++++++
 include/phb4.h |  1 +
 2 files changed, 11 insertions(+)

Comments

Vasant Hegde Aug. 8, 2019, 6:54 a.m. UTC | #1
On 08/02/2019 01:30 PM, Oliver O'Halloran wrote:
> While the the ETU is in reset we cannot access any of the PHB registers.
> If a PHB register is accessed via the XSCOM indirect interface then
> we'll cause an ETU reset error which may prevent the PHB from being
> re-initialised once the reset is lifted.
> 
> Prevent register accesses while in reset by adding a flag that is set
> while the ETU reset bit is high and checking that flag in the XSCOM
> (ASB) backdoor register access path.

Candidate for #stable ?

-Vasant
Oliver O'Halloran Aug. 8, 2019, 6:59 a.m. UTC | #2
On Thu, Aug 8, 2019 at 4:54 PM Vasant Hegde
<hegdevasant@linux.vnet.ibm.com> wrote:
>
> On 08/02/2019 01:30 PM, Oliver O'Halloran wrote:
> > While the the ETU is in reset we cannot access any of the PHB registers.
> > If a PHB register is accessed via the XSCOM indirect interface then
> > we'll cause an ETU reset error which may prevent the PHB from being
> > re-initialised once the reset is lifted.
> >
> > Prevent register accesses while in reset by adding a flag that is set
> > while the ETU reset bit is high and checking that flag in the XSCOM
> > (ASB) backdoor register access path.
>
> Candidate for #stable ?

Yeah, it's being held in the skiboot-stable moderation queue while I
try and find out how to access that.

Also, do you want me to make you list moderator for skiboot-stable?

>
> -Vasant
>

Patch
diff mbox series

diff --git a/hw/phb4.c b/hw/phb4.c
index 1b618d07e52a..35b2354e7286 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -214,6 +214,10 @@  static inline void phb4_write_reg_asb(struct phb4 *p,
 
 static uint64_t phb4_read_reg(struct phb4 *p, uint32_t offset)
 {
+	/* No register accesses are permitted while in reset */
+	if (p->flags & PHB4_ETU_IN_RESET)
+		return -1ull;
+
 	if (p->flags & PHB4_CFG_USE_ASB)
 		return phb4_read_reg_asb(p, offset);
 	else
@@ -222,6 +226,10 @@  static uint64_t phb4_read_reg(struct phb4 *p, uint32_t offset)
 
 static void phb4_write_reg(struct phb4 *p, uint32_t offset, uint64_t val)
 {
+	/* No register accesses are permitted while in reset */
+	if (p->flags & PHB4_ETU_IN_RESET)
+		return;
+
 	if (p->flags & PHB4_CFG_USE_ASB)
 		phb4_write_reg_asb(p, offset, val);
 	else
@@ -3282,6 +3290,7 @@  static int64_t phb4_creset(struct pci_slot *slot)
 		phb4_err_clear(p);
 
 		/* Actual reset */
+		p->flags |= PHB4_ETU_IN_RESET;
 		xscom_write(p->chip_id, p->pci_stk_xscom + XPEC_PCI_STK_ETU_RESET,
 			    0x8000000000000000UL);
 
@@ -3335,6 +3344,7 @@  static int64_t phb4_creset(struct pci_slot *slot)
 			/* Clear PHB from reset */
 			xscom_write(p->chip_id,
 				    p->pci_stk_xscom + XPEC_PCI_STK_ETU_RESET, 0x0);
+			p->flags &= ~PHB4_ETU_IN_RESET;
 
 			pci_slot_set_state(slot, PHB4_SLOT_CRESET_REINIT);
 			/* After lifting PHB reset, wait while logic settles */
diff --git a/include/phb4.h b/include/phb4.h
index af2e3eda8b15..1c68ec2e2ff7 100644
--- a/include/phb4.h
+++ b/include/phb4.h
@@ -151,6 +151,7 @@  struct phb4_err {
 #define PHB4_CFG_BLOCKED	0x00000004
 #define PHB4_CAPP_RECOVERY	0x00000008
 #define PHB4_CAPP_DISABLE	0x00000010
+#define PHB4_ETU_IN_RESET	0x00000020
 
 struct phb4 {
 	unsigned int		index;	    /* 0..5 index inside p9 */