From patchwork Fri Aug 2 07:04:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Park, Aiden" X-Patchwork-Id: 1140988 X-Patchwork-Delegate: bmeng.cn@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 460JCJ20t3z9sBF for ; Fri, 2 Aug 2019 17:07:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id DDDE0C21DDC; Fri, 2 Aug 2019 07:06:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9064FC21DCA; Fri, 2 Aug 2019 07:04:43 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DF757C21E50; Fri, 2 Aug 2019 07:04:25 +0000 (UTC) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by lists.denx.de (Postfix) with ESMTPS id 41A41C21E1D for ; Fri, 2 Aug 2019 07:04:19 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 02 Aug 2019 00:04:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,337,1559545200"; d="scan'208";a="180931691" Received: from orsmsx101.amr.corp.intel.com ([10.22.225.128]) by FMSMGA003.fm.intel.com with ESMTP; 02 Aug 2019 00:04:17 -0700 Received: from orsmsx116.amr.corp.intel.com ([169.254.7.85]) by ORSMSX101.amr.corp.intel.com ([169.254.8.157]) with mapi id 14.03.0439.000; Fri, 2 Aug 2019 00:04:17 -0700 From: "Park, Aiden" To: Bin Meng , Andy Shevchenko , U-Boot Mailing List , Simon Glass Thread-Topic: [PATCH v8 8/9] board: intel: Add new slimbootloader board Thread-Index: AdVI//brcdt0b1e9Qf2cjKdSP72+Sg== Date: Fri, 2 Aug 2019 07:04:16 +0000 Message-ID: Accept-Language: ko-KR, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMGFhODAzZWMtNWJkMy00YzFmLWE5NmUtYjU2OGI2MjI0NjMyIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUklNT1wvSFJqTGtpQjk3OTB6TmU2TytOSzlYSHV5UVprNGg2MHVCV0ZydVJObXNrVm9GelNzaVk0QktxMGRxYmgifQ== x-ctpclassification: CTP_NT x-originating-ip: [10.22.254.138] MIME-Version: 1.0 Subject: [U-Boot] [PATCH v8 8/9] board: intel: Add new slimbootloader board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add slimbootloader board to run U-boot as a Slim Bootloader payload - Add new board/intel/slimbootloader directory with minimum codes - Add slimbootloader configuration files - Add doc/board/intel/slimbootloader.rst Signed-off-by: Aiden Park Reviewed-by: Bin Meng Reviewed-by: Andy Shevchenko --- Changes in v8: * Add a space between acronym and (definition) Changes in v7: * Adding slimbootloader.rst in index.rst Changes in v6: * Select CONFIG_SYS_SLIMBOOTLOADER in board Kconfig * Move USB_STORAGE and USB_KEYBOARD to board Kconfig * Convert README to reST doc/board/intel/slimbootloader.rst Changes in v5: * Remove X86_LOAD_FROM_32_BIT from slimbootloader_defconfig Changes in v3: * Remove VENDOR_SLIMBOOTLOADER * Use VENDOR_INTEL * Move slimbootloader under board/intel/ * Enable generic CONFIGs in slimbootloader_defconfig * Add more description in board/intel/slimbootloader/README board/intel/Kconfig | 14 ++ board/intel/slimbootloader/Kconfig | 28 ++++ board/intel/slimbootloader/Makefile | 5 + board/intel/slimbootloader/slimbootloader.c | 21 +++ board/intel/slimbootloader/start.S | 9 + configs/slimbootloader_defconfig | 22 +++ doc/board/intel/index.rst | 1 + doc/board/intel/slimbootloader.rst | 174 ++++++++++++++++++++ include/configs/slimbootloader.h | 62 +++++++ 9 files changed, 336 insertions(+) create mode 100644 board/intel/slimbootloader/Kconfig create mode 100644 board/intel/slimbootloader/Makefile create mode 100644 board/intel/slimbootloader/slimbootloader.c create mode 100644 board/intel/slimbootloader/start.S create mode 100644 configs/slimbootloader_defconfig create mode 100644 doc/board/intel/slimbootloader.rst create mode 100644 include/configs/slimbootloader.h diff --git a/board/intel/Kconfig b/board/intel/Kconfig index 5131836cb0..7b16ec4dc1 100644 --- a/board/intel/Kconfig +++ b/board/intel/Kconfig @@ -73,6 +73,19 @@ config TARGET_MINNOWMAX Note that PCIE_ECAM_BASE is set up by the FSP so the value used by U-Boot matches that value. +config TARGET_SLIMBOOTLOADER + bool "slimbootloader" + help + This target is used for running U-Boot on top of Slim Bootloader + boot firmware as a payload. Slim Bootloader does memory initialization + and silicon initialization, and it passes necessary information in + HOB (Hand Off Block) to a payload. The payload consumes HOB data + which is generated by Slim Bootloader for its driver initialization. + Slim Bootloader consumes FSP and its HOB, but FSP HOB is cleared + Before launching a payload. Instead, Slim Bootloader generates its + HOB data such as memory info, serial port info and so on. + Refer to doc/board/intel/slimbootloader.rst for the details. + endchoice source "board/intel/bayleybay/Kconfig" @@ -82,5 +95,6 @@ source "board/intel/crownbay/Kconfig" source "board/intel/edison/Kconfig" source "board/intel/galileo/Kconfig" source "board/intel/minnowmax/Kconfig" +source "board/intel/slimbootloader/Kconfig" endif diff --git a/board/intel/slimbootloader/Kconfig b/board/intel/slimbootloader/Kconfig new file mode 100644 index 0000000000..8c7e22cc33 --- /dev/null +++ b/board/intel/slimbootloader/Kconfig @@ -0,0 +1,28 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation + +if TARGET_SLIMBOOTLOADER + +config SYS_BOARD + default "slimbootloader" + +config SYS_VENDOR + default "intel" + +config SYS_SOC + default "slimbootloader" + +config SYS_CONFIG_NAME + default "slimbootloader" + +config SYS_TEXT_BASE + default 0x00100000 + +config BOARD_SPECIFIC_OPTIONS + def_bool y + select SYS_SLIMBOOTLOADER + select USB_STORAGE + select USB_KEYBOARD + +endif diff --git a/board/intel/slimbootloader/Makefile b/board/intel/slimbootloader/Makefile new file mode 100644 index 0000000000..fd8fa98a8d --- /dev/null +++ b/board/intel/slimbootloader/Makefile @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2019 Intel Corporation + +obj-y += start.o slimbootloader.o diff --git a/board/intel/slimbootloader/slimbootloader.c b/board/intel/slimbootloader/slimbootloader.c new file mode 100644 index 0000000000..f50eeb823f --- /dev/null +++ b/board/intel/slimbootloader/slimbootloader.c @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2019 Intel Corporation + */ + +#include + +int board_early_init_r(void) +{ + /* + * Make sure PCI bus is enumerated so that peripherals on the PCI bus + * can be discovered by their drivers. + * + * Slim Bootloader has already done PCI bus enumeration before loading + * U-Boot, so U-Boot needs to preserve PCI configuration. + * Therefore, '# CONFIG_PCI_PNP is not set' is included in defconfig. + */ + pci_init(); + + return 0; +} diff --git a/board/intel/slimbootloader/start.S b/board/intel/slimbootloader/start.S new file mode 100644 index 0000000000..5c3f3df09e --- /dev/null +++ b/board/intel/slimbootloader/start.S @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation + */ + +/* board early initialization */ +.globl early_board_init +early_board_init: + jmp early_board_init_ret diff --git a/configs/slimbootloader_defconfig b/configs/slimbootloader_defconfig new file mode 100644 index 0000000000..b16ed71469 --- /dev/null +++ b/configs/slimbootloader_defconfig @@ -0,0 +1,22 @@ +CONFIG_X86=y +CONFIG_VENDOR_INTEL=y +CONFIG_TARGET_SLIMBOOTLOADER=y +CONFIG_DEFAULT_DEVICE_TREE="slimbootloader" +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_BOARD_EARLY_INIT_R=y +CONFIG_LAST_STAGE_INIT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_MMC=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_FAT=y +CONFIG_CMD_USB=y +CONFIG_DOS_PARTITION=y +CONFIG_EFI_PARTITION=y +CONFIG_OF_CONTROL=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_BOOTDELAY=10 +CONFIG_CONSOLE_SCROLL_LINES=5 +# CONFIG_PCI_PNP is not set diff --git a/doc/board/intel/index.rst b/doc/board/intel/index.rst index f416801910..f545dee87a 100644 --- a/doc/board/intel/index.rst +++ b/doc/board/intel/index.rst @@ -13,3 +13,4 @@ Intel edison galileo minnowmax + slimbootloader diff --git a/doc/board/intel/slimbootloader.rst b/doc/board/intel/slimbootloader.rst new file mode 100644 index 0000000000..4a46fed069 --- /dev/null +++ b/doc/board/intel/slimbootloader.rst @@ -0,0 +1,174 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Aiden Park + +Slim Bootloader +=============== + +Introduction +------------ + +This target is to enable U-Boot_ as a payload of `Slim Bootloader`_ (a.k.a SBL) +boot firmware which currently supports QEMU, Apollolake, Whiskeylake, +Coffeelake-R platforms. + +The `Slim Bootloader`_ is designed with multi-stages (Stage1A/B, Stage2, Payload) +architecture to cover from reset vector to OS booting and it consumes +`Intel FSP`_ for silicon initialization. + +* Stage1A: Reset vector, CAR init with FSP-T +* Stage1B: Memory init with FSP-M, CAR teardown, Continue execution in memory +* Stage2 : Rest of Silicon init with FSP-S, Create HOB, Hand-off to Payload +* Payload: Payload init with HOB, Load OS from media, Booting OS + +The Slim Bootloader stages (Stage1A/B, Stage2) focus on chipset, hardware and +platform specific initialization, and it provides useful information to a +payload in a HOB (Hand-Off Block) which has serial port, memory map, performance +data info and so on. This is Slim Bootloader architectural design to make a +payload light-weight, platform independent and more generic across different +boot solutions or payloads, and to minimize hardware re-initialization in a +payload. + +Build Instruction for U-Boot as a Slim Bootloader payload +--------------------------------------------------------- + +Build U-Boot and obtain u-boot-dtb.bin:: + + $ make distclean + $ make slimbootloader_defconfig + $ make all + +Prepare Slim Bootloader +----------------------- + +1. Setup Build Environment for Slim Bootloader. + + Refer to `Getting Started`_ page in `Slim Bootloader`_ document site. + +2. Get source code. Let's simply clone the repo:: + + $ git clone https://github.com/slimbootloader/slimbootloader.git + +3. Copy u-boot-dtb.bin to Slim Bootloader. + Slim Bootloader looks for a payload from the specific location. + Copy the build u-boot-dtb.bin to the expected location:: + + $ mkdir -p /PayloadPkg/PayloadBins/ + $ cp /u-boot-dtb.bin /PayloadPkg/PayloadBins/u-boot-dtb.bin + +Build Instruction for Slim Bootloader for QEMU target +----------------------------------------------------- + +Slim Bootloader supports multiple payloads, and a board of Slim Bootloader +detects its target payload by PayloadId in board configuration. +The PayloadId can be any 4 Bytes value. + +1. Update PayloadId. Let's use 'U-BT' as an example:: + + $ vi Platform/QemuBoardPkg/CfgData/CfgDataExt_Brd1.dlt + -GEN_CFG_DATA.PayloadId | 'AUTO' + +GEN_CFG_DATA.PayloadId | 'U-BT' + +2. Update payload text base. PAYLOAD_EXE_BASE must be the same as U-Boot + CONFIG_SYS_TEXT_BASE in board/intel/slimbootloader/Kconfig. + PAYLOAD_LOAD_HIGH must be 0:: + + $ vi Platform/QemuBoardPkg/BoardConfig.py + + self.PAYLOAD_LOAD_HIGH = 0 + + self.PAYLOAD_EXE_BASE = 0x00100000 + +3. Build QEMU target. Make sure u-boot-dtb.bin and U-BT PayloadId + in build command. The output is Outputs/qemu/SlimBootloader.bin:: + + $ python BuildLoader.py build qemu -p "OsLoader.efi:LLDR:Lz4;u-boot-dtb.bin:U-BT:Lzma" + +4. Launch Slim Bootloader on QEMU. + You should reach at U-Boot serial console:: + + $ qemu-system-x86_64 -machine q35 -nographic -serial mon:stdio -pflash Outputs/qemu/SlimBootloader.bin + +Build Instruction for Slim Bootloader for LeafHill (APL) target +-------------------------------------------------------------- + +LeafHill is using PCI UART2 device as a serial port. +For MEM32 serial port, CONFIG_SYS_NS16550_MEM32 needs to be enabled in U-Boot. + +1. Enable CONFIG_SYS_NS16550_MEM32 in U-Boot:: + + $ vi include/configs/slimbootloader.h + +#define CONFIG_SYS_NS16550_MEM32 + #ifdef CONFIG_SYS_NS16550_MEM3 + +2. Build U-Boot:: + + $ make disclean + $ make slimbootloader_defconfig + $ make all + +3. Copy u-boot-dtb.bin to Slim Bootloader. + Slim Bootloader looks for a payload from the specific location. + Copy the build u-boot-dtb.bin to the expected location:: + + $ mkdir -p /PayloadPkg/PayloadBins/ + $ cp /u-boot-dtb.bin /PayloadPkg/PayloadBins/u-boot-dtb.bin + +4. Update PayloadId. Let's use 'U-BT' as an example:: + + $ vi Platform/ApollolakeBoardPkg/CfgData/CfgData_Int_LeafHill.dlt + -GEN_CFG_DATA.PayloadId | 'AUTO + +GEN_CFG_DATA.PayloadId | 'U-BT' + +5. Update payload text base. + +* PAYLOAD_EXE_BASE must be the same as U-Boot CONFIG_SYS_TEXT_BASE + in board/intel/slimbootloader/Kconfig. +* PAYLOAD_LOAD_HIGH must be 0:: + + $ vi Platform/ApollolakeBoardPkg/BoardConfig.py + + self.PAYLOAD_LOAD_HIGH = 0 + + self.PAYLOAD_EXE_BASE = 0x00100000 + +6. Build APL target. Make sure u-boot-dtb.bin and U-BT PayloadId + in build command. The output is Outputs/apl/Stitch_Components.zip:: + + $ python BuildLoader.py build apl -p "OsLoader.efi:LLDR:Lz4;u-boot-dtb.bin:U-BT:Lzma" + +7. Stitch IFWI. + + Refer to Apollolake_ page in Slim Bootloader document site:: + + $ python Platform/ApollolakeBoardPkg/Script/StitchLoader.py -i -s Outputs/apl/Stitch_Components.zip -o + +8. Flash IFWI. + + Use DediProg to flash IFWI. You should reach at U-Boot serial console. + + +Build Instruction to use ELF U-Boot +----------------------------------- + +1. Enable CONFIG_OF_EMBED:: + + $ vi configs/slimbootloader_defconfig + +CONFIG_OF_EMBED=y + +2. Build U-Boot:: + + $ make disclean + $ make slimbootloader_defconfig + $ make all + $ strip u-boot (removing symbol for reduced size) + +3. Do same steps as above + +* Copy u-boot (ELF) to PayloadBins directory +* Update PayloadId 'U-BT' as above. +* No need to set PAYLOAD_LOAD_HIGH and PAYLOAD_EXE_BASE. +* Build Slim Bootloader. Use u-boot instead of u-boot-dtb.bin:: + + $ python BuildLoader.py build -p "OsLoader.efi:LLDR:Lz4;u-boot:U-BT:Lzma" + +.. _U-Boot: https://gitlab.denx.de/ +.. _`Slim Bootloader`: https://github.com/slimbootloader/ +.. _`Intel FSP`: https://github.com/IntelFsp/ +.. _`Getting Started`: https://slimbootloader.github.io/getting-started/ +.. _Apollolake: https://slimbootloader.github.io/supported-hardware/apollo-lake-crb.html#stitching diff --git a/include/configs/slimbootloader.h b/include/configs/slimbootloader.h new file mode 100644 index 0000000000..e0011ed446 --- /dev/null +++ b/include/configs/slimbootloader.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2019 Intel Corporation + */ + +#ifndef __SLIMBOOTLOADER_CONFIG_H__ +#define __SLIMBOOTLOADER_CONFIG_H__ + +#include + +/* + * By default, CONFIG_SYS_NS16550_PORT_MAPPED is enabled for port io serial. + * To use mmio base serial, enable CONFIG_SYS_NS16550_MEM32 and disable + * CONFIG_SYS_NS16550_PORT_MAPPED until ns16550 driver supports serial port + * configuration in run-time. + * + * #define CONFIG_SYS_NS16550_MEM32 + * #undef CONFIG_SYS_NS16550_PORT_MAPPED + */ +#ifdef CONFIG_SYS_NS16550_MEM32 +#undef CONFIG_SYS_NS16550_PORT_MAPPED +#endif + +#define CONFIG_STD_DEVICES_SETTINGS \ + "stdin=serial,i8042-kbd,usbkbd\0" \ + "stdout=serial\0" \ + "stderr=serial\0" + +/* + * Override CONFIG_EXTRA_ENV_SETTINGS in x86-common.h + */ +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + CONFIG_STD_DEVICES_SETTINGS \ + "netdev=eth0\0" \ + "consoledev=ttyS0\0" \ + "ramdiskaddr=0x4000000\0" \ + "ramdiskfile=initrd\0" \ + "bootdev=usb\0" \ + "bootdevnum=0\0" \ + "bootdevpart=0\0" \ + "bootfsload=fatload\0" \ + "bootusb=setenv bootdev usb; boot\0" \ + "bootscsi=setenv bootdev scsi; boot\0" \ + "bootmmc=setenv bootdev mmc; boot\0" \ + "bootargs=console=ttyS0,115200 console=tty0\0" + +/* + * Override CONFIG_BOOTCOMMAND in x86-common.h + */ +#undef CONFIG_BOOTCOMMAND +#define CONFIG_BOOTCOMMAND \ + "if test ${bootdev} = \"usb\"; then ${bootdev} start; fi; " \ + "if test ${bootdev} = \"scsi\"; then ${bootdev} scan; fi; " \ + "${bootdev} info; " \ + "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ + "${loadaddr} ${bootfile}; " \ + "${bootfsload} ${bootdev} ${bootdevnum}:${bootdevpart} " \ + "${ramdiskaddr} ${ramdiskfile}; " \ + "zboot ${loadaddr} 0 ${ramdiskaddr} ${filesize}" + +#endif /* __SLIMBOOTLOADER_CONFIG_H__ */