From patchwork Thu Aug 1 08:55:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Barrat X-Patchwork-Id: 1140356 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45zkdh48Wxz9s7T for ; Thu, 1 Aug 2019 18:55:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 45zkdh0CkxzDqjH for ; Thu, 1 Aug 2019 18:55:20 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=fbarrat@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 45zkdW3lDQzDqFS for ; Thu, 1 Aug 2019 18:55:10 +1000 (AEST) Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x718pOo9146729 for ; Thu, 1 Aug 2019 04:55:07 -0400 Received: from e06smtp02.uk.ibm.com (e06smtp02.uk.ibm.com [195.75.94.98]) by mx0b-001b2d01.pphosted.com with ESMTP id 2u3u38ctk7-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 01 Aug 2019 04:55:06 -0400 Received: from localhost by e06smtp02.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 1 Aug 2019 09:55:02 +0100 Received: from b06wcsmtp001.portsmouth.uk.ibm.com (b06wcsmtp001.portsmouth.uk.ibm.com [9.149.105.160]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x718siLg38666542 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 1 Aug 2019 08:54:44 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E6606A4067; Thu, 1 Aug 2019 08:55:00 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B0D64A406A; Thu, 1 Aug 2019 08:55:00 +0000 (GMT) Received: from bali.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.17]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Thu, 1 Aug 2019 08:55:00 +0000 (GMT) From: Frederic Barrat To: skiboot@lists.ozlabs.org, andrew.donnellan@au1.ibm.com, clombard@linux.ibm.com, arbab@linux.ibm.com, alistair@popple.id.au Date: Thu, 1 Aug 2019 10:55:00 +0200 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190801085500.12505-1-fbarrat@linux.ibm.com> References: <20190801085500.12505-1-fbarrat@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19080108-0008-0000-0000-000003033D4F X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19080108-0009-0000-0000-000022723F61 Message-Id: <20190801085500.12505-2-fbarrat@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-08-01_05:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1906280000 definitions=main-1908010092 Subject: [Skiboot] [PATCH 2/2] npu2: Remove ibm, phb-index property from the NPU dt node X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The 'ibm,phb-index' property of the NPU node is now useless, as we can have multiple PHBs associated to the same NPU on P9. Let's remove it to avoid confusion. Signed-off-by: Frederic Barrat Reviewed-by: Andrew Donnellan --- doc/device-tree/opencapi.rst | 1 - hdata/spira.c | 6 ++---- hdata/test/op920.wsp.dts | 2 -- hw/npu3.c | 1 - platforms/astbmc/mihawk.c | 2 -- platforms/astbmc/zaius.c | 2 -- platforms/ibm-fsp/zz.c | 2 -- 7 files changed, 2 insertions(+), 14 deletions(-) diff --git a/doc/device-tree/opencapi.rst b/doc/device-tree/opencapi.rst index 80ff9963..497654ac 100644 --- a/doc/device-tree/opencapi.rst +++ b/doc/device-tree/opencapi.rst @@ -19,7 +19,6 @@ NVLink links are currently unsupported. npu@5011000 { compatible = "ibm,power9-npu"; phandle = <0xe6>; - ibm,phb-index = <0x7>; reg = <0x5011000 0x2c>; ibm,npu-index = <0x0>; ibm,npu-links = <0x2>; /* Number of links wired up to this npu. */ diff --git a/hdata/spira.c b/hdata/spira.c index f6003ea0..01c881ee 100644 --- a/hdata/spira.c +++ b/hdata/spira.c @@ -1333,7 +1333,7 @@ static void add_stop_levels(void) #define NPU_INDIRECT1 0x800000000c010c3fULL static void add_npu(struct dt_node *xscom, const struct HDIF_array_hdr *links, - int npu_index, int phb_index) + int npu_index) { const struct sppcrd_smp_link *link; struct dt_node *npu; @@ -1354,7 +1354,6 @@ static void add_npu(struct dt_node *xscom, const struct HDIF_array_hdr *links, dt_add_property_cells(npu, "#address-cells", 1); dt_add_property_strings(npu, "compatible", "ibm,power9-npu"); - dt_add_property_cells(npu, "ibm,phb-index", phb_index); dt_add_property_cells(npu, "ibm,npu-index", npu_index); HDIF_iarray_for_each(links, i, link) { @@ -1504,7 +1503,6 @@ static void add_npu(struct dt_node *xscom, const struct HDIF_array_hdr *links, static void add_npus(void) { struct dt_node *xscom; - int phb_index = 7; /* Start counting from 7, for no reason */ int npu_index = 0; /* Only consult HDAT for npu2 */ @@ -1529,7 +1527,7 @@ static void add_npus(void) /* some hostboots will give us an empty array */ if (be32_to_cpu(links->ecnt)) - add_npu(xscom, links, npu_index++, phb_index++); + add_npu(xscom, links, npu_index++); } } diff --git a/hdata/test/op920.wsp.dts b/hdata/test/op920.wsp.dts index b9aa0f20..f5fd684a 100644 --- a/hdata/test/op920.wsp.dts +++ b/hdata/test/op920.wsp.dts @@ -4055,7 +4055,6 @@ #size-cells = <0x0>; #address-cells = <0x1>; compatible = "ibm,power9-npu"; - ibm,phb-index = <0x7>; ibm,npu-index = <0x0>; ibm,npu-links = <0x6>; @@ -4685,7 +4684,6 @@ #size-cells = <0x0>; #address-cells = <0x1>; compatible = "ibm,power9-npu"; - ibm,phb-index = <0x8>; ibm,npu-index = <0x1>; ibm,npu-links = <0x6>; diff --git a/hw/npu3.c b/hw/npu3.c index e49e9bef..f2dff16d 100644 --- a/hw/npu3.c +++ b/hw/npu3.c @@ -101,7 +101,6 @@ static void npu3_dt_create_npu(struct dt_node *xscom, uint32_t npu_index) dt_add_property_cells(npu, "reg", npu_base[npu_index], 0x2c); dt_add_property_string(npu, "compatible", "ibm,power9-npu3"); dt_add_property_cells(npu, "ibm,npu-index", npu_index); - dt_add_property_cells(npu, "ibm,phb-index", 7 + npu_index); for (uint32_t i = 0; i < NPU3_LINKS_PER_NPU; i++) npu3_dt_create_link(npu, npu_index, i); diff --git a/platforms/astbmc/mihawk.c b/platforms/astbmc/mihawk.c index feae205f..3e7310d4 100644 --- a/platforms/astbmc/mihawk.c +++ b/platforms/astbmc/mihawk.c @@ -184,7 +184,6 @@ static void mihawk_create_npu(void) { struct dt_node *xscom, *npu; int npu_index = 0; - int phb_index = 7; char namebuf[32]; /* Return if there's already an NPU in the device tree */ @@ -198,7 +197,6 @@ static void mihawk_create_npu(void) dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); dt_add_property_strings(npu, "compatible", "ibm,power9-npu"); dt_add_property_cells(npu, "ibm,npu-index", npu_index++); - dt_add_property_cells(npu, "ibm,phb-index", phb_index++); dt_add_property_cells(npu, "ibm,npu-links", 2); create_link(npu, 1, 2); create_link(npu, 2, 3); diff --git a/platforms/astbmc/zaius.c b/platforms/astbmc/zaius.c index ab355888..36dee632 100644 --- a/platforms/astbmc/zaius.c +++ b/platforms/astbmc/zaius.c @@ -157,7 +157,6 @@ static void zaius_create_npu(void) { struct dt_node *xscom, *npu; int npu_index = 0; - int phb_index = 7; char namebuf[32]; /* Abort if there's already an NPU in the device tree */ @@ -171,7 +170,6 @@ static void zaius_create_npu(void) dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); dt_add_property_strings(npu, "compatible", "ibm,power9-npu"); dt_add_property_cells(npu, "ibm,npu-index", npu_index++); - dt_add_property_cells(npu, "ibm,phb-index", phb_index++); dt_add_property_cells(npu, "ibm,npu-links", 2); create_link(npu, 1, 2); create_link(npu, 2, 3); diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 2bde315c..92f4fcb2 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -65,7 +65,6 @@ static void add_opencapi_dt_nodes(void) { struct dt_node *npu, *xscom; int npu_index = 0; - int phb_index = 7; /* * In an ideal world, we should get all the NPU links @@ -115,7 +114,6 @@ static void add_opencapi_dt_nodes(void) dt_add_property_cells(npu, "reg", NPU_BASE, NPU_SIZE); dt_add_property_strings(npu, "compatible", "ibm,power9-npu"); dt_add_property_cells(npu, "ibm,npu-index", npu_index++); - dt_add_property_cells(npu, "ibm,phb-index", phb_index++); dt_add_property_cells(npu, "ibm,npu-links", 2); create_link(npu, 1, 2);