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, PowerPC #16, Update a comment and move a predicate

Message ID 20190725222925.GA31563@ibm-toto.the-meissners.org
State New
Headers show
Series , PowerPC #16, Update a comment and move a predicate | expand

Commit Message

Michael Meissner July 25, 2019, 10:29 p.m. UTC 
This is patch #16 that fixes some things when I noticed when I was creating
patch #15.  I separated it out just to simplify things.  It updates a comment
in talking about pc-relative external addresses that was wrong.  In also moves
a predicate so that all of the pcrel_* predicates could be together in the
predicates.md file.

I have a build queued up with these changes.  Assuming that there are no
regressions, can I check these changes into the FSF tree.

This is a series of separate patches to add functionality to the PowerPC
backend to support future processors.  Here is a high level summary of the
patches:

 * Patches 1-8, have already been applied
 * Patch 9 has been rewritten in patches 12-13
 * Patch 10 is withdrawn for now
 * Patch 11 adds DS offset mode to rs6000.c's reg_addr
 * Patch 12 adds a new enumeration for instruction format
 * Patch 13 adds support for matching prefixed insns
 * Patch 14 adds pc-relative support to load up addresses
 * Patch 15 renamed some functions to be smaller
 * Patch 16 updated a comment and moved a predicate
 * Patch 17 adds the prefixed RTL attribute & emitting 'p' before prefixed
 * Patch 18 adds prefixed support for scalar types
 * Patch 19 uses a separate 'future' cost structure
 * Patch 20 clones power9.md for initial scheduling on future.md.

The following patches have not yet been written, but I expect them to be:

 * Patch 21 finish prefixed insn support for vectors & 128-bit int/floats
 * Patch 22 enable pc-relative by default
 * Patch 23 add pcrel linker optimization
 * Patch 24 new tests

2019-07-25  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/predicates.md (pcrel_external_address): Update
	comment.
	(prefixed_mem_operand): Move lower in the file so the pcrel_*
	predicates are all grouped together.
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Patch

Index: gcc/config/rs6000/predicates.md
===================================================================
--- gcc/config/rs6000/predicates.md	(revision 273798)
+++ gcc/config/rs6000/predicates.md	(working copy)
@@ -1647,11 +1647,11 @@ 
 
 ;; Return true if the operand is an external symbol whose address can be loaded
 ;; into a register using:
-;;	PLA reg,label@pcrel@got
+;;	PLD reg,label@pcrel@got
 ;;
 ;; The linker will either optimize this to either a PADDI if the label is
 ;; defined locally in another module or a PLD of the address if the label is
-;; defined in another module.
+;; defined in a shared library.
 
 (define_predicate "pcrel_external_address"
   (match_code "symbol_ref,const")
@@ -1662,13 +1662,6 @@ 
   return addr_validate_p (op, INSN_FORM_PREFIXED, ADDR_VALIDATE_PCREL_EXT);
 })
 
-;; Return 1 if op is a prefixed memory operand.
-(define_predicate "prefixed_mem_operand"
-  (match_code "mem")
-{
-  return prefixed_addr_mode_p (XEXP (op, 0), GET_MODE (op));
-})
-
 ;; Return 1 if op is a memory operand to an external variable when we
 ;; support pc-relative addressing and the PCREL_OPT relocation to
 ;; optimize references to it.
@@ -1682,6 +1675,13 @@ 
   return addr_validate_p (addr, INSN_FORM_PREFIXED, ADDR_VALIDATE_PCREL_EXT);
 })
 
+;; Return 1 if op is a prefixed memory operand.
+(define_predicate "prefixed_mem_operand"
+  (match_code "mem")
+{
+  return prefixed_addr_mode_p (XEXP (op, 0), GET_MODE (op));
+})
+
 ;; Match the first insn (addis) in fusing the combination of addis and loads to
 ;; GPR registers on power8.
 (define_predicate "fusion_gpr_addis"