@@ -60,6 +60,7 @@ config ROCKCHIP_RK322X
select TPL_NEEDS_SEPARATE_TEXT_BASE if SPL
select TPL_NEEDS_SEPARATE_STACK if TPL
select SPL_DRIVERS_MISC_SUPPORT
+ imply ROCKCHIP_COMMON_BOARD
imply SPL_SERIAL_SUPPORT
imply SPL_ROCKCHIP_COMMON_BOARD
imply TPL_SERIAL_SUPPORT
@@ -23,7 +23,6 @@ obj-y += boot_mode.o
obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o
obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
-obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
obj-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board.o
obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399-board.o
obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108-board.o
deleted file mode 100644
@@ -1,97 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
- */
-#include <common.h>
-#include <clk.h>
-#include <dm.h>
-#include <ram.h>
-#include <syscon.h>
-#include <asm/io.h>
-#include <asm/arch-rockchip/boot_mode.h>
-#include <asm/arch-rockchip/clock.h>
-#include <asm/arch-rockchip/periph.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-__weak int rk_board_late_init(void)
-{
- return 0;
-}
-
-int board_late_init(void)
-{
- setup_boot_mode();
-
- return rk_board_late_init();
-}
-
-int board_init(void)
-{
- return 0;
-}
-
-#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
-void enable_caches(void)
-{
- /* Enable D-cache. I-cache is already enabled in start.S */
- dcache_enable();
-}
-#endif
-
-#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
-#include <usb.h>
-#include <usb/dwc2_udc.h>
-
-static struct dwc2_plat_otg_data otg_data = {
- .rx_fifo_sz = 512,
- .np_tx_fifo_sz = 16,
- .tx_fifo_sz = 128,
-};
-
-int board_usb_init(int index, enum usb_init_type init)
-{
- int node;
- const char *mode;
- bool matched = false;
- const void *blob = gd->fdt_blob;
-
- /* find the usb_otg node */
- node = fdt_node_offset_by_compatible(blob, -1,
- "snps,dwc2");
-
- while (node > 0) {
- mode = fdt_getprop(blob, node, "dr_mode", NULL);
- if (mode && strcmp(mode, "otg") == 0) {
- matched = true;
- break;
- }
-
- node = fdt_node_offset_by_compatible(blob, node,
- "snps,dwc2");
- }
- if (!matched) {
- debug("Not found usb_otg device\n");
- return -ENODEV;
- }
- otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
-
- return dwc2_udc_probe(&otg_data);
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
- return 0;
-}
-#endif
-
-#if CONFIG_IS_ENABLED(FASTBOOT)
-int fastboot_set_reboot_flag(void)
-{
- printf("Setting reboot to fastboot flag ...\n");
- /* Set boot mode to fastboot */
- writel(BOOT_FASTBOOT, CONFIG_ROCKCHIP_BOOT_MODE_REG);
-
- return 0;
-}
-#endif
Use common board file for board_init() and board_late_init(), for Rockchip SoCs have very similar process. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- arch/arm/mach-rockchip/Kconfig | 1 + arch/arm/mach-rockchip/Makefile | 1 - arch/arm/mach-rockchip/rk322x-board.c | 97 --------------------------- 3 files changed, 1 insertion(+), 98 deletions(-) delete mode 100644 arch/arm/mach-rockchip/rk322x-board.c