From patchwork Mon Sep 5 23:55:44 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Max Filippov X-Patchwork-Id: 113472 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id E0246B6F7E for ; Tue, 6 Sep 2011 11:30:30 +1000 (EST) Received: from localhost ([::1]:47568 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0j2o-0005tH-T8 for incoming@patchwork.ozlabs.org; Mon, 05 Sep 2011 19:57:38 -0400 Received: from eggs.gnu.org ([140.186.70.92]:36930) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0j1P-0003Ry-SX for qemu-devel@nongnu.org; Mon, 05 Sep 2011 19:56:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R0j1I-0003K6-ON for qemu-devel@nongnu.org; Mon, 05 Sep 2011 19:56:10 -0400 Received: from [188.134.19.124] (port=53337 helo=octofox.metropolis) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R0j1H-0003J9-Fc for qemu-devel@nongnu.org; Mon, 05 Sep 2011 19:56:04 -0400 Received: from octofox.metropolis (localhost [127.0.0.1]) by octofox.metropolis (8.14.5/8.14.5) with ESMTP id p85NuCls023092; Tue, 6 Sep 2011 03:56:12 +0400 Received: (from jcmvbkbc@localhost) by octofox.metropolis (8.14.5/8.14.5/Submit) id p85NuCRf023091; Tue, 6 Sep 2011 03:56:12 +0400 From: Max Filippov To: qemu-devel@nongnu.org Date: Tue, 6 Sep 2011 03:55:44 +0400 Message-Id: <1315266957-22979-21-git-send-email-jcmvbkbc@gmail.com> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1315266957-22979-1-git-send-email-jcmvbkbc@gmail.com> References: <1315266957-22979-1-git-send-email-jcmvbkbc@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 188.134.19.124 Cc: jcmvbkbc@gmail.com Subject: [Qemu-devel] [PATCH v5 20/33] target-xtensa: implement loop option X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org See ISA, 4.3.2 for details. Operations that change LEND SR value invalidate TBs at the old and at the new LEND. LEND value at TB compilation time is considered constant and loop instruction is generated based on this value. Invalidation may be avoided for the TB at the old LEND address, since looping code verifies actual LEND value. Invalidation may be avoided for the TB at the new LEND address if there's a way to associate LEND address with TB at compilation time and later verify that it doesn't change. Signed-off-by: Max Filippov --- target-xtensa/cpu.h | 3 ++ target-xtensa/helpers.h | 2 + target-xtensa/op_helper.c | 20 ++++++++++++ target-xtensa/translate.c | 77 +++++++++++++++++++++++++++++++++++++++----- 4 files changed, 93 insertions(+), 9 deletions(-) diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 7e662f5..97badf2 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -106,6 +106,9 @@ enum { }; enum { + LBEG = 0, + LEND = 1, + LCOUNT = 2, SAR = 3, SCOMPARE1 = 12, WINDOW_BASE = 72, diff --git a/target-xtensa/helpers.h b/target-xtensa/helpers.h index 0971fde..b318c5a 100644 --- a/target-xtensa/helpers.h +++ b/target-xtensa/helpers.h @@ -12,6 +12,8 @@ DEF_HELPER_1(rotw, void, i32) DEF_HELPER_2(window_check, void, i32, i32) DEF_HELPER_0(restore_owb, void) DEF_HELPER_1(movsp, void, i32) +DEF_HELPER_1(wsr_lbeg, void, i32) +DEF_HELPER_1(wsr_lend, void, i32) DEF_HELPER_0(dump_state, void) #include "def-helper.h" diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index 7c3fb88..5e0f56f 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -288,6 +288,26 @@ void HELPER(movsp)(uint32_t pc) } } +void HELPER(wsr_lbeg)(uint32_t v) +{ + if (env->sregs[LBEG] != v) { + tb_invalidate_phys_page_range( + env->sregs[LEND] - 1, env->sregs[LEND], 0); + env->sregs[LBEG] = v; + } +} + +void HELPER(wsr_lend)(uint32_t v) +{ + if (env->sregs[LEND] != v) { + tb_invalidate_phys_page_range( + env->sregs[LEND] - 1, env->sregs[LEND], 0); + env->sregs[LEND] = v; + tb_invalidate_phys_page_range( + env->sregs[LEND] - 1, env->sregs[LEND], 0); + } +} + void HELPER(dump_state)(void) { cpu_dump_state(env, stderr, fprintf, 0); diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 7a2e07f..8f45007 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -47,6 +47,8 @@ typedef struct DisasContext { uint32_t next_pc; int cring; int ring; + uint32_t lbeg; + uint32_t lend; int is_jmp; int singlestep_enabled; @@ -65,6 +67,9 @@ static TCGv_i32 cpu_UR[256]; #include "gen-icount.h" static const char * const sregnames[256] = { + [LBEG] = "LBEG", + [LEND] = "LEND", + [LCOUNT] = "LCOUNT", [SAR] = "SAR", [SCOMPARE1] = "SCOMPARE1", [WINDOW_BASE] = "WINDOW_BASE", @@ -247,13 +252,37 @@ static void gen_callwi(DisasContext *dc, int callinc, uint32_t dest, int slot) tcg_temp_free(tmp); } +static bool gen_check_loop_end(DisasContext *dc, int slot) +{ + if (option_enabled(dc, XTENSA_OPTION_LOOP) && + !(dc->tb->flags & XTENSA_TBFLAG_EXCM) && + dc->next_pc == dc->lend) { + int label = gen_new_label(); + + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_SR[LCOUNT], 0, label); + tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_SR[LCOUNT], 1); + gen_jumpi(dc, dc->lbeg, slot); + gen_set_label(label); + gen_jumpi(dc, dc->next_pc, -1); + return true; + } + return false; +} + +static void gen_jumpi_check_loop_end(DisasContext *dc, int slot) +{ + if (!gen_check_loop_end(dc, slot)) { + gen_jumpi(dc, dc->next_pc, slot); + } +} + static void gen_brcond(DisasContext *dc, TCGCond cond, TCGv_i32 t0, TCGv_i32 t1, uint32_t offset) { int label = gen_new_label(); tcg_gen_brcond_i32(cond, t0, t1, label); - gen_jumpi(dc, dc->next_pc, 0); + gen_jumpi_check_loop_end(dc, 0); gen_set_label(label); gen_jumpi(dc, dc->pc + offset, 1); } @@ -283,6 +312,16 @@ static void gen_rsr(DisasContext *dc, TCGv_i32 d, uint32_t sr) } } +static void gen_wsr_lbeg(DisasContext *dc, uint32_t sr, TCGv_i32 s) +{ + gen_helper_wsr_lbeg(s); +} + +static void gen_wsr_lend(DisasContext *dc, uint32_t sr, TCGv_i32 s) +{ + gen_helper_wsr_lend(s); +} + static void gen_wsr_sar(DisasContext *dc, uint32_t sr, TCGv_i32 s) { tcg_gen_andi_i32(cpu_SR[sr], s, 0x3f); @@ -308,13 +347,15 @@ static void gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v) } tcg_gen_andi_i32(cpu_SR[sr], v, mask); /* This can change mmu index, so exit tb */ - gen_jumpi(dc, dc->next_pc, -1); + gen_jumpi_check_loop_end(dc, -1); } static void gen_wsr(DisasContext *dc, uint32_t sr, TCGv_i32 s) { static void (* const wsr_handler[256])(DisasContext *dc, uint32_t sr, TCGv_i32 v) = { + [LBEG] = gen_wsr_lbeg, + [LEND] = gen_wsr_lend, [SAR] = gen_wsr_sar, [WINDOW_BASE] = gen_wsr_windowbase, [PS] = gen_wsr_ps, @@ -1542,15 +1583,29 @@ static void disas_xtensa_insn(DisasContext *dc) break; case 8: /*LOOP*/ - TBD(); - break; - case 9: /*LOOPNEZ*/ - TBD(); - break; - case 10: /*LOOPGTZ*/ - TBD(); + HAS_OPTION(XTENSA_OPTION_LOOP); + { + uint32_t lend = dc->pc + RRI8_IMM8 + 4; + TCGv_i32 tmp = tcg_const_i32(lend); + + tcg_gen_subi_i32(cpu_SR[LCOUNT], cpu_R[RRI8_S], 1); + tcg_gen_movi_i32(cpu_SR[LBEG], dc->next_pc); + gen_wsr_lend(dc, LEND, tmp); + tcg_temp_free(tmp); + + if (BRI8_R > 8) { + int label = gen_new_label(); + tcg_gen_brcondi_i32( + BRI8_R == 9 ? TCG_COND_NE : TCG_COND_GT, + cpu_R[RRI8_S], 0, label); + gen_jumpi(dc, lend, 1); + gen_set_label(label); + } + + gen_jumpi(dc, dc->next_pc, 0); + } break; default: /*reserved*/ @@ -1727,7 +1782,9 @@ static void disas_xtensa_insn(DisasContext *dc) break; } + gen_check_loop_end(dc, 0); dc->pc = dc->next_pc; + return; invalid_opcode: @@ -1773,6 +1830,8 @@ static void gen_intermediate_code_internal( dc.pc = pc_start; dc.ring = tb->flags & XTENSA_TBFLAG_RING_MASK; dc.cring = (tb->flags & XTENSA_TBFLAG_EXCM) ? 0 : dc.ring; + dc.lbeg = env->sregs[LBEG]; + dc.lend = env->sregs[LEND]; dc.is_jmp = DISAS_NEXT; init_sar_tracker(&dc);