| Message ID | 1563534631-15897-3-git-send-email-yash.shah@sifive.com |
|---|---|
| State | Changes Requested |
| Delegated to: | David Miller |
| Headers | show |
| Series | [1/3] macb: bindings doc: update sifive fu540-c000 binding | expand |
The series looks good to me. Reviewed-by: Sagar Kadam <sagar.kadam@sifive.com> On Fri, Jul 19, 2019 at 4:41 PM Yash Shah <yash.shah@sifive.com> wrote: > > DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added > > Signed-off-by: Yash Shah <yash.shah@sifive.com> > --- > arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 15 +++++++++++++++ > arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 9 +++++++++ > 2 files changed, 24 insertions(+) > > diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > index cc73522..588669f0 100644 > --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > @@ -231,5 +231,20 @@ > #size-cells = <0>; > status = "disabled"; > }; > + eth0: ethernet@10090000 { > + compatible = "sifive,fu540-c000-gem"; > + interrupt-parent = <&plic0>; > + interrupts = <53>; > + reg = <0x0 0x10090000 0x0 0x2000 > + 0x0 0x100a0000 0x0 0x1000>; > + local-mac-address = [00 00 00 00 00 00]; > + clock-names = "pclk", "hclk"; > + clocks = <&prci PRCI_CLK_GEMGXLPLL>, > + <&prci PRCI_CLK_GEMGXLPLL>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; > + > }; > }; > diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > index 0b55c53..85c17a7 100644 > --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > @@ -76,3 +76,12 @@ > disable-wp; > }; > }; > + > +ð0 { > + status = "okay"; > + phy-mode = "gmii"; > + phy-handle = <&phy1>; > + phy1: ethernet-phy@0 { > + reg = <0>; > + }; > +}; > -- > 1.9.1 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Fri, Jul 19, 2019 at 05:23:45PM +0530, Sagar Kadam wrote: > > +ð0 { > > + status = "okay"; > > + phy-mode = "gmii"; > > + phy-handle = <&phy1>; > > + phy1: ethernet-phy@0 { > > + reg = <0>; > > + }; Hi Sagar Is there a good reason to call it phy1? Is there a phy0? Thanks Andrew
Hello Andrew, On Fri, Jul 19, 2019 at 6:57 PM Andrew Lunn <andrew@lunn.ch> wrote: > > On Fri, Jul 19, 2019 at 05:23:45PM +0530, Sagar Kadam wrote: > > > +ð0 { > > > + status = "okay"; > > > + phy-mode = "gmii"; > > > + phy-handle = <&phy1>; > > > + phy1: ethernet-phy@0 { > > > + reg = <0>; > > > + }; > > Hi Sagar > > Is there a good reason to call it phy1? Is there a phy0? > Sorry for the delayed response. There is a single phy, so yes phy0 is a better name. Thank you for pointing this out. Thanks & Regards, Sagar Kadam > Thanks > > Andrew > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Fri, 19 Jul 2019, Yash Shah wrote: > DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added > > Signed-off-by: Yash Shah <yash.shah@sifive.com> Thanks, queuing this one for v5.3-rc with Andrew's suggested change to change phy1 to phy0. Am assuming patches 1 and 2 will go in via -net. - Paul
On Mon, Jul 22, 2019 at 02:48:40PM -0700, Paul Walmsley wrote: > On Fri, 19 Jul 2019, Yash Shah wrote: > > > DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added > > > > Signed-off-by: Yash Shah <yash.shah@sifive.com> > > Thanks, queuing this one for v5.3-rc with Andrew's suggested change to > change phy1 to phy0. > > Am assuming patches 1 and 2 will go in via -net. I don't think that has happened. Rob
diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index cc73522..588669f0 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -231,5 +231,20 @@ #size-cells = <0>; status = "disabled"; }; + eth0: ethernet@10090000 { + compatible = "sifive,fu540-c000-gem"; + interrupt-parent = <&plic0>; + interrupts = <53>; + reg = <0x0 0x10090000 0x0 0x2000 + 0x0 0x100a0000 0x0 0x1000>; + local-mac-address = [00 00 00 00 00 00]; + clock-names = "pclk", "hclk"; + clocks = <&prci PRCI_CLK_GEMGXLPLL>, + <&prci PRCI_CLK_GEMGXLPLL>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + }; }; diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts index 0b55c53..85c17a7 100644 --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts @@ -76,3 +76,12 @@ disable-wp; }; }; + +ð0 { + status = "okay"; + phy-mode = "gmii"; + phy-handle = <&phy1>; + phy1: ethernet-phy@0 { + reg = <0>; + }; +};
DT node for SiFive FU540-C000 GEMGXL Ethernet controller driver added Signed-off-by: Yash Shah <yash.shah@sifive.com> --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 15 +++++++++++++++ arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 9 +++++++++ 2 files changed, 24 insertions(+)