| Message ID | 20190718115420.19919-8-clg@kaod.org |
|---|---|
| State | New |
| Headers | show |
| Series | ppc/pnv: add XIVE support for KVM guests | expand |
On Thu, Jul 18, 2019 at 01:54:10PM +0200, Cédric Le Goater wrote: > When the 's' bit is set the escalation is said to be 'silent' or > 'silent/gather'. In such configuration, the notification sequence is > skipped and only the escalation sequence is performed. This is used to > configure all the EQs of a vCPU to escalate on a single EQ which will > then target the hypervisor. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- > include/hw/ppc/xive_regs.h | 2 ++ > hw/intc/xive.c | 8 ++++++++ > 2 files changed, 10 insertions(+) > > diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h > index 5d02ccfeff16..69af326ebf2c 100644 > --- a/include/hw/ppc/xive_regs.h > +++ b/include/hw/ppc/xive_regs.h > @@ -209,6 +209,8 @@ typedef struct XiveEND { > #define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) & END_W0_ESCALATE_CTL) > #define xive_end_is_uncond_escalation(end) \ > (be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE) > +#define xive_end_is_silent_escalation(end) \ > + (be32_to_cpu((end)->w0) & END_W0_SILENT_ESCALATE) > > static inline uint64_t xive_end_qaddr(XiveEND *end) > { > diff --git a/hw/intc/xive.c b/hw/intc/xive.c > index c2e7e2d4c9a9..8ea97ac231a4 100644 > --- a/hw/intc/xive.c > +++ b/hw/intc/xive.c > @@ -1463,6 +1463,13 @@ static void xive_router_end_notify(XiveRouter *xrtr, uint8_t end_blk, > xive_router_write_end(xrtr, end_blk, end_idx, &end, 1); > } > > + /* > + * When the END is silent, we skip the notification part. > + */ > + if (xive_end_is_silent_escalation(&end)) { > + goto do_escalation; I don't love this use of goto, but I'll take it for now. > + } > + > /* > * The W7 format depends on the F bit in W6. It defines the type > * of the notification : > @@ -1542,6 +1549,7 @@ static void xive_router_end_notify(XiveRouter *xrtr, uint8_t end_blk, > */ > } > > +do_escalation: > /* > * If activated, escalate notification using the ESe PQ bits and > * the EAS in w4-5
diff --git a/include/hw/ppc/xive_regs.h b/include/hw/ppc/xive_regs.h index 5d02ccfeff16..69af326ebf2c 100644 --- a/include/hw/ppc/xive_regs.h +++ b/include/hw/ppc/xive_regs.h @@ -209,6 +209,8 @@ typedef struct XiveEND { #define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) & END_W0_ESCALATE_CTL) #define xive_end_is_uncond_escalation(end) \ (be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE) +#define xive_end_is_silent_escalation(end) \ + (be32_to_cpu((end)->w0) & END_W0_SILENT_ESCALATE) static inline uint64_t xive_end_qaddr(XiveEND *end) { diff --git a/hw/intc/xive.c b/hw/intc/xive.c index c2e7e2d4c9a9..8ea97ac231a4 100644 --- a/hw/intc/xive.c +++ b/hw/intc/xive.c @@ -1463,6 +1463,13 @@ static void xive_router_end_notify(XiveRouter *xrtr, uint8_t end_blk, xive_router_write_end(xrtr, end_blk, end_idx, &end, 1); } + /* + * When the END is silent, we skip the notification part. + */ + if (xive_end_is_silent_escalation(&end)) { + goto do_escalation; + } + /* * The W7 format depends on the F bit in W6. It defines the type * of the notification : @@ -1542,6 +1549,7 @@ static void xive_router_end_notify(XiveRouter *xrtr, uint8_t end_blk, */ } +do_escalation: /* * If activated, escalate notification using the ESe PQ bits and * the EAS in w4-5
When the 's' bit is set the escalation is said to be 'silent' or 'silent/gather'. In such configuration, the notification sequence is skipped and only the escalation sequence is performed. This is used to configure all the EQs of a vCPU to escalate on a single EQ which will then target the hypervisor. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- include/hw/ppc/xive_regs.h | 2 ++ hw/intc/xive.c | 8 ++++++++ 2 files changed, 10 insertions(+)