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[147.11.224.80]) by smtp.gmail.com with ESMTPSA id q1sm39859821pfn.178.2019.07.18.00.35.11 (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 18 Jul 2019 00:35:11 -0700 (PDT) From: Bin Meng To: Tom Rini , Simon Glass , Wolfgang Denk , Heinrich Schuchardt , Mario Six , U-Boot Mailing List Date: Thu, 18 Jul 2019 00:34:13 -0700 Message-Id: <1563435275-22326-29-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1563435275-22326-1-git-send-email-bmeng.cn@gmail.com> References: <1563435275-22326-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH 28/50] doc: board: Add coreboot board doc X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This extracts coreboot board specific information from README.x86, converts plain text documentation to reST format and adds it to Sphinx TOC tree. No essential content change. Signed-off-by: Bin Meng --- doc/README.x86 | 37 ------------------------------------ doc/board/coreboot/coreboot.rst | 42 +++++++++++++++++++++++++++++++++++++++++ doc/board/coreboot/index.rst | 9 +++++++++ doc/board/index.rst | 1 + 4 files changed, 52 insertions(+), 37 deletions(-) create mode 100644 doc/board/coreboot/coreboot.rst create mode 100644 doc/board/coreboot/index.rst diff --git a/doc/README.x86 b/doc/README.x86 index 2374be9..c987439 100644 --- a/doc/README.x86 +++ b/doc/README.x86 @@ -39,14 +39,6 @@ Linux kernel as part of a FIT image. It also supports a compressed zImage. U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks for more details. -Build Instructions for U-Boot as coreboot payload -------------------------------------------------- -Building U-Boot as a coreboot payload is just like building U-Boot for targets -on other architectures, like below: - -$ make coreboot_defconfig -$ make all - Build Instructions for U-Boot as BIOS replacement (bare mode) ------------------------------------------------------------- Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a @@ -82,35 +74,6 @@ Device Tree Control ---> ... (qemu-x86_q35) Default Device Tree for DT control -Test with coreboot ------------------- -For testing U-Boot as the coreboot payload, there are things that need be paid -attention to. coreboot supports loading an ELF executable and a 32-bit plain -binary, as well as other supported payloads. With the default configuration, -U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the -generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool -provided by coreboot) manually as coreboot's 'make menuconfig' does not provide -this capability yet. The command is as follows: - -# in the coreboot root directory -$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ - -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 - -Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address -of _x86boot_start (in arch/x86/cpu/start.S). - -If you want to use ELF as the coreboot payload, change U-Boot configuration to -use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. - -To enable video you must enable these options in coreboot: - - - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) - - Keep VESA framebuffer - -At present it seems that for Minnowboard Max, coreboot does not pass through -the video information correctly (it always says the resolution is 0x0). This -works correctly for link though. - Test with QEMU for bare mode ---------------------------- QEMU is a fancy emulator that can enable us to test U-Boot without access to diff --git a/doc/board/coreboot/coreboot.rst b/doc/board/coreboot/coreboot.rst new file mode 100644 index 0000000..fd97422 --- /dev/null +++ b/doc/board/coreboot/coreboot.rst @@ -0,0 +1,42 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Bin Meng + +Coreboot +======== + +Build Instructions for U-Boot as coreboot payload +------------------------------------------------- +Building U-Boot as a coreboot payload is just like building U-Boot for targets +on other architectures, like below:: + + $ make coreboot_defconfig + $ make all + +Test with coreboot +------------------ +For testing U-Boot as the coreboot payload, there are things that need be paid +attention to. coreboot supports loading an ELF executable and a 32-bit plain +binary, as well as other supported payloads. With the default configuration, +U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the +generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool +provided by coreboot) manually as coreboot's 'make menuconfig' does not provide +this capability yet. The command is as follows:: + + # in the coreboot root directory + $ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ + -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 + +Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address +of _x86boot_start (in arch/x86/cpu/start.S). + +If you want to use ELF as the coreboot payload, change U-Boot configuration to +use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. + +To enable video you must enable these options in coreboot: + + - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) + - Keep VESA framebuffer + +At present it seems that for Minnowboard Max, coreboot does not pass through +the video information correctly (it always says the resolution is 0x0). This +works correctly for link though. diff --git a/doc/board/coreboot/index.rst b/doc/board/coreboot/index.rst new file mode 100644 index 0000000..d148db9 --- /dev/null +++ b/doc/board/coreboot/index.rst @@ -0,0 +1,9 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Coreboot +======== + +.. toctree:: + :maxdepth: 2 + + coreboot diff --git a/doc/board/index.rst b/doc/board/index.rst index 59f745d..eb21a67 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -6,5 +6,6 @@ Board-specific doc .. toctree:: :maxdepth: 2 + coreboot/index google/index intel/index