[U-Boot,1/1] video: dw_hdmi: Add support for ddc-i2c-bus property
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Message ID 20190717193552.7080-1-me@jns.io
State Superseded
Delegated to: Anatolij Gustschin
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  • [U-Boot,1/1] video: dw_hdmi: Add support for ddc-i2c-bus property
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Commit Message

Niklas Schulze July 17, 2019, 7:35 p.m. UTC
Add support for the ddc-i2c-bus device tree property which allows for
using an external i2c master for reading the display's EDID.

Signed-off-by: Niklas Schulze <me@jns.io>
---
 drivers/video/dw_hdmi.c             | 10 ++++++++++
 drivers/video/meson/meson_dw_hdmi.c |  2 ++
 drivers/video/rockchip/rk_hdmi.c    |  2 ++
 drivers/video/sunxi/sunxi_dw_hdmi.c |  2 ++
 include/dw_hdmi.h                   |  1 +
 5 files changed, 17 insertions(+)

Comments

Anatolij Gustschin July 26, 2019, 7:49 p.m. UTC | #1
On Wed, 17 Jul 2019 19:35:52 +0000
Niklas Schulze me@jns.io wrote:
...
> @@ -812,6 +813,15 @@ static int hdmi_read_edid(struct dw_hdmi *hdmi, int block, u8 *buff)
>  	u32 trytime = 5;
>  	u32 n;
>  
> +	struct udevice *chip;
> +	if (hdmi->ddc_bus) {

here, please use something like:

	if (CONFIG_IS_ENABLED(DM_I2C) && hdmi->ddc_bus) {
		struct udevice *chip;

there are boards that do not enable CONFIG_DM_I2C yet, and we will
see build breakage in such cases:

drivers/built-in.o: In function `hdmi_read_edid':
drivers/video/meson/../dw_hdmi.c:818: undefined reference to `i2c_get_chip'
drivers/video/meson/../dw_hdmi.c:822: undefined reference to `dm_i2c_read'

--
Anatolij

Patch
diff mbox series

diff --git a/drivers/video/dw_hdmi.c b/drivers/video/dw_hdmi.c
index 463436edf3..f64a484d7c 100644
--- a/drivers/video/dw_hdmi.c
+++ b/drivers/video/dw_hdmi.c
@@ -8,6 +8,7 @@ 
 #include <common.h>
 #include <fdtdec.h>
 #include <asm/io.h>
+#include <i2c.h>
 #include <media_bus_format.h>
 #include "dw_hdmi.h"
 
@@ -812,6 +813,15 @@  static int hdmi_read_edid(struct dw_hdmi *hdmi, int block, u8 *buff)
 	u32 trytime = 5;
 	u32 n;
 
+	struct udevice *chip;
+	if (hdmi->ddc_bus) {
+		edid_read_err = i2c_get_chip(hdmi->ddc_bus, 0x50, 1, &chip);
+		if (edid_read_err)
+			return edid_read_err;
+
+		return dm_i2c_read(chip, shift, buff, HDMI_EDID_BLOCK_SIZE);
+	}
+
 	/* set ddc i2c clk which devided from ddc_clk to 100khz */
 	hdmi_write(hdmi, hdmi->i2c_clk_high, HDMI_I2CM_SS_SCL_HCNT_0_ADDR);
 	hdmi_write(hdmi, hdmi->i2c_clk_low, HDMI_I2CM_SS_SCL_LCNT_0_ADDR);
diff --git a/drivers/video/meson/meson_dw_hdmi.c b/drivers/video/meson/meson_dw_hdmi.c
index 483c93f6b6..930bc64bf6 100644
--- a/drivers/video/meson/meson_dw_hdmi.c
+++ b/drivers/video/meson/meson_dw_hdmi.c
@@ -375,6 +375,8 @@  static int meson_dw_hdmi_probe(struct udevice *dev)
 	}
 #endif
 
+	uclass_get_device_by_phandle(UCLASS_I2C, dev, "ddc-i2c-bus", &priv->hdmi.ddc_bus);
+
 	ret = reset_get_bulk(dev, &resets);
 	if (ret)
 		return ret;
diff --git a/drivers/video/rockchip/rk_hdmi.c b/drivers/video/rockchip/rk_hdmi.c
index 51931ceefa..b4250c8ee9 100644
--- a/drivers/video/rockchip/rk_hdmi.c
+++ b/drivers/video/rockchip/rk_hdmi.c
@@ -93,6 +93,8 @@  int rk_hdmi_ofdata_to_platdata(struct udevice *dev)
 
 	priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
 
+	uclass_get_device_by_phandle(UCLASS_I2C, dev, "ddc-i2c-bus", &hdmi->ddc_bus);
+
 	return 0;
 }
 
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 6fe1aa7ee4..bff73aa4e5 100644
--- a/drivers/video/sunxi/sunxi_dw_hdmi.c
+++ b/drivers/video/sunxi/sunxi_dw_hdmi.c
@@ -373,6 +373,8 @@  static int sunxi_dw_hdmi_probe(struct udevice *dev)
 	priv->hdmi.phy_set = sunxi_dw_hdmi_phy_cfg;
 	priv->mux = uc_plat->source_id;
 
+	uclass_get_device_by_phandle(UCLASS_I2C, dev, "ddc-i2c-bus", &priv->hdmi.ddc_bus);
+
 	dw_hdmi_init(&priv->hdmi);
 
 	return 0;
diff --git a/include/dw_hdmi.h b/include/dw_hdmi.h
index 90fb64bc99..8acae3839f 100644
--- a/include/dw_hdmi.h
+++ b/include/dw_hdmi.h
@@ -542,6 +542,7 @@  struct dw_hdmi {
 	u8 i2c_clk_low;
 	u8 reg_io_width;
 	struct hdmi_data_info hdmi_data;
+	struct udevice *ddc_bus;
 
 	int (*phy_set)(struct dw_hdmi *hdmi, uint mpixelclock);
 	void (*write_reg)(struct dw_hdmi *hdmi, u8 val, int offset);