From patchwork Wed Jul 17 14:38:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1133344 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-505208-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45pfz523jFz9s3l for ; Thu, 18 Jul 2019 00:38:55 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=J0CkxRNHfdtCw3uPOaf/DY1hv4x8aBNtSzE9TUWQaEEVe2 6JqaB6QiP1aikLJlO0yJDTkNc+yQMc3JYrq6wjRqevwzIkwcYPe9RXhEMEGBB+ZE k+huxX1hDROBiPvDmEDOm0JTffQg0WKaUMfLingw8YtMZnW/bWAfJhzAE5YGA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=py7ngUFbTKfkyI1en5eG+Jc9yTs=; b=YrFR1joNiU2c4ZmnFVbG /CkPVfElfumn9kN5QplGZZcE5Qq0rhPoGjfIVP/5wEO/KLyoX9qpPiRjeO9+UUem V7ijMN9jYSSENWPf9gNQBUj64dQYXmoU9NG66cUiN3xqA/NwP+6iA7FGFybA0if6 ic+Bq8x6bjBBHS1F3Po1rEY= Received: (qmail 65076 invoked by alias); 17 Jul 2019 14:38:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 65064 invoked by uid 89); 17 Jul 2019 14:38:46 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-7.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=Potential X-HELO: mail-ed1-f47.google.com Received: from mail-ed1-f47.google.com (HELO mail-ed1-f47.google.com) (209.85.208.47) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 17 Jul 2019 14:38:45 +0000 Received: by mail-ed1-f47.google.com with SMTP id r12so25954510edo.5 for ; Wed, 17 Jul 2019 07:38:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:from:date:message-id:subject:to; bh=svz5qx5SlqnvwSrA7CYxjUFzkxnNDSYwbP5+H9YHfgg=; b=Rq+Lio1lFxNGqWpcblnZUeC3tU4jzd9MfdDbJl6t/d80hHQ2lMMR9KFCwFrPJaaQzm gDrgdKH40nAeTxU5m5NzmxJqcyVMwO7plLefh/k363maONAMLk1Y7Ngp8k6RUxCiqyu2 ZDtHYzSzrja6GCvklo1Bnoz29CMkgN4iOgFV+Tu7TDYjt1JlXH4+95qFea4R/xH2Ybwk /l0cr176P2P1ISBU4misGnFOoFADUHORxjOwEIXHX2Cd5ZqM9ZCE27kUkC/bjz8Ah5zY 1U33yIGKoI8q/EeLoTDlLIJZS7BP/6KUyjh+xCazBB/tdQBlSD9qmeV9G+okjGaxHY/4 IhuA== MIME-Version: 1.0 From: Uros Bizjak Date: Wed, 17 Jul 2019 16:38:31 +0200 Message-ID: Subject: [PATCH, i386]: Handle potential partial reg stall in *andqi_2_maybe_si To: "gcc-patches@gcc.gnu.org" 2019-07-17 Uroš Bizjak * config/i386/i386.md (*andqi_2_maybe_si): Handle potential partial reg stall on alternative 2. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 273534) +++ config/i386/i386.md (working copy) @@ -8689,7 +8689,7 @@ (match_operand:QI 1 "nonimmediate_operand" "%0,0,0") (match_operand:QI 2 "general_operand" "qmn,qn,n")) (const_int 0))) - (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r") + (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,r") (and:QI (match_dup 1) (match_dup 2)))] "ix86_binary_operator_ok (AND, QImode, operands) && ix86_match_ccmode (insn, @@ -8705,7 +8705,12 @@ return "and{b}\t{%2, %0|%0, %2}"; } [(set_attr "type" "alu") - (set_attr "mode" "QI,QI,SI")]) + (set_attr "mode" "QI,QI,SI") + ;; Potential partial reg stall on alternative 2. + (set (attr "preferred_for_speed") + (cond [(eq_attr "alternative" "2") + (symbol_ref "!TARGET_PARTIAL_REG_STALL")] + (symbol_ref "true")))]) (define_insn "*and_2" [(set (reg FLAGS_REG)