diff --git a/arch/x86/cpu/slimbootloader/Makefile b/arch/x86/cpu/slimbootloader/Makefile
index 05d0ca4a19..68c4a91955 100644
--- a/arch/x86/cpu/slimbootloader/Makefile
+++ b/arch/x86/cpu/slimbootloader/Makefile
@@ -2,4 +2,4 @@
 #
 # Copyright (C) 2019 Intel Corporation <www.intel.com>

-obj-y += car.o slimbootloader.o dram.o
+obj-y += car.o slimbootloader.o dram.o serial.o
diff --git a/arch/x86/cpu/slimbootloader/serial.c b/arch/x86/cpu/slimbootloader/serial.c
new file mode 100644
index 0000000000..5a8591889f
--- /dev/null
+++ b/arch/x86/cpu/slimbootloader/serial.c
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Intel Corporation <www.intel.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <serial.h>
+#include <asm/arch/slimbootloader.h>
+
+/**
+ * The serial port info hob is generated by Slim Bootloader, so eligible for
+ * Slim Bootloader based boards only.
+ */
+static int slimbootloader_serial_ofdata_to_platdata(struct udevice *dev)
+{
+       const struct efi_guid guid = LOADER_SERIAL_PORT_INFO_GUID;
+       struct serial_port_info *serial_info = NULL;
+       struct ns16550_platdata *plat = dev->platdata;
+
+       if (!gd->arch.hob_list)
+               panic("hob list not found!");
+
+       serial_info = (struct serial_port_info *)
+           hob_get_guid_hob_data(gd->arch.hob_list, NULL, &guid);
+
+       if (!serial_info) {
+               debug("failed to get serial port information\n");
+               return -ENOENT;
+       }
+       debug("type:%d base=0x%08x baudrate=%d stride=%d clk=%d\n",
+             serial_info->type,
+             serial_info->base,
+             serial_info->baud,
+             serial_info->stride,
+             serial_info->clk);
+
+       /*
+        * The serial_info->type provides port io or mmio access type info,
+        * but the access type will be controlled by
+        * CONFIG_SYS_NS16550_PORT_MAPPED or CONFIG_SYS_NS16550_MEM32.
+        *
+        * TBD: ns16550 access type configuration in runtime.
+        *      ex) plat->access_type = serial_info->type
+        */
+       plat->base = serial_info->base;
+       /* ns16550 uses reg_shift, then covert stride to shift */
+       plat->reg_shift = (serial_info->stride >> 1);
+       plat->clock = serial_info->clk;
+
+       return 0;
+}
+
+static const struct udevice_id slimbootloader_serial_ids[] = {
+       { .compatible = "intel,slimbootloader-uart" },
+       {}
+};
+
+U_BOOT_DRIVER(serial_slimbootloader) = {
+       .name   = "serial_slimbootloader",
+       .id     = UCLASS_SERIAL,
+       .of_match = slimbootloader_serial_ids,
+       .ofdata_to_platdata = slimbootloader_serial_ofdata_to_platdata,
+       .platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+       .priv_auto_alloc_size = sizeof(struct NS16550),
+       .probe  = ns16550_serial_probe,
+       .ops    = &ns16550_serial_ops,
+};
diff --git a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
index d9265ac534..5a0994544a 100644
--- a/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
+++ b/arch/x86/include/asm/arch-slimbootloader/slimbootloader.h
@@ -18,6 +18,15 @@
        { 0xa9, 0xe4, 0x92, 0xf3, 0x57, 0xd1, 0x28, 0x32 } \
        }

+/**
+ * A GUID to get SerialPort info hob which is provided by Slim Bootloader
+ */
+#define LOADER_SERIAL_PORT_INFO_GUID \
+       { \
+       0x6c6872fe, 0x56a9, 0x4403, \
+       { 0xbb, 0x98, 0x95, 0x8d, 0x62, 0xde, 0x87, 0xf1 } \
+       }
+
 /**
  * A single entry of memory map information
  *
@@ -35,6 +44,33 @@ struct memory_map_entry {
        u8      rsvd[6];
 } __packed;

+/**
+ * This includes serial port info which has already been initialized in previous
+ * Slim Bootloader stage.
+ * The Slim Bootloader initializes serial port regardless of debug/release build
+ * modes, and it passes the information to a payload thru hob. So, a payload can
+ * re-use the serial information without re-initializing serial port.
+ *
+ * @rev   : revision of serial_port_info structure. currently 1.
+ * @rsvd  : padding for alignment
+ * @type  : port io: 1, mmio: 2
+ * @base  : io base address. ex) 0x3f8, 0x80001000
+ * @baud  : uart baud rate
+ * @stride: register stride in Bytes
+ * @clk   : uart frequency in Hz
+ * @rsvd1 : reserved
+ */
+struct serial_port_info {
+       u8      rev;
+       u8      rsvd[3];
+       u32     type;
+       u32     base;
+       u32     baud;
+       u32     stride;
+       u32     clk;
+       u32     rsvd1;
+} __packed;
+
 /**
  * This includes all memory map entries which is sorted based on physical start
  * address, from low to high, and carved out reserved, acpi nvs, acpi reclaim
