| Message ID | 20190716180940.17828-1-sumit.saxena@broadcom.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | PCI: set BAR size bits correctly in Resize BAR control register | expand |
+Christian Koenig On Tue, Jul 16, 2019 at 3:41 PM Sumit Saxena <sumit.saxena@broadcom.com> wrote: > > In Resize BAR control register, bits[8:12] represents size of BAR. > As per PCIe specification, below is encoded values in register bits > to actual BAR size table: > > Bits BAR size > 0 1 MB > 1 2 MB > 2 4 MB > 3 8 MB > -- > > For 1 MB BAR size, BAR size bits should be set to 0 but incorrectly > these bits are set to "1f". > Latest megaraid_sas and mpt3sas adapters which support Resizable BAR > with 1 MB BAR size fails to initialize during system resume from S3 sleep. > > Fix: Correctly set BAR size bits to "0" for 1MB BAR size. > > CC: stable@vger.kernel.org # v4.16+ > Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939 > Fixes: d3252ace0bc652a1a244455556b6a549f969bf99 ("PCI: Restore resized BAR state on resume") > Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com> > --- > drivers/pci/pci.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index 8abc843..b651f32 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -1417,12 +1417,13 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) > > for (i = 0; i < nbars; i++, pos += 8) { > struct resource *res; > - int bar_idx, size; > + int bar_idx, size, order; > > pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); > bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX; > res = pdev->resource + bar_idx; > - size = order_base_2((resource_size(res) >> 20) | 1) - 1; > + order = order_base_2((resource_size(res) >> 20) | 1); > + size = order ? order - 1 : 0; > ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE; > ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT; > pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); > -- > 1.8.3.1 >
Am 19.07.19 um 19:56 schrieb Sumit Saxena: > +Christian Koenig > > On Tue, Jul 16, 2019 at 3:41 PM Sumit Saxena <sumit.saxena@broadcom.com> wrote: >> In Resize BAR control register, bits[8:12] represents size of BAR. >> As per PCIe specification, below is encoded values in register bits >> to actual BAR size table: >> >> Bits BAR size >> 0 1 MB >> 1 2 MB >> 2 4 MB >> 3 8 MB >> -- >> >> For 1 MB BAR size, BAR size bits should be set to 0 but incorrectly >> these bits are set to "1f". >> Latest megaraid_sas and mpt3sas adapters which support Resizable BAR >> with 1 MB BAR size fails to initialize during system resume from S3 sleep. >> >> Fix: Correctly set BAR size bits to "0" for 1MB BAR size. >> >> CC: stable@vger.kernel.org # v4.16+ >> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939 >> Fixes: d3252ace0bc652a1a244455556b6a549f969bf99 ("PCI: Restore resized BAR state on resume") >> Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com> >> --- >> drivers/pci/pci.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c >> index 8abc843..b651f32 100644 >> --- a/drivers/pci/pci.c >> +++ b/drivers/pci/pci.c >> @@ -1417,12 +1417,13 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) >> >> for (i = 0; i < nbars; i++, pos += 8) { >> struct resource *res; >> - int bar_idx, size; >> + int bar_idx, size, order; >> >> pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); >> bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX; >> res = pdev->resource + bar_idx; >> - size = order_base_2((resource_size(res) >> 20) | 1) - 1; >> + order = order_base_2((resource_size(res) >> 20) | 1); >> + size = order ? order - 1 : 0; That actually doesn't looks like it is correct or at least it's unnecessary complex. The " >> 20) | 1" seems like a copy & paste error from the code in amdgpu where the BAR needs to larger than the VRAM size (which is not a power of two). So just using "size = order_base_2(resource_size(res) >> 20);" should be sufficient here. Regards, Christian. >> ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE; >> ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT; >> pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); >> -- >> 1.8.3.1 >>
On Sun, Jul 21, 2019 at 8:17 PM Koenig, Christian <Christian.Koenig@amd.com> wrote: > > Am 19.07.19 um 19:56 schrieb Sumit Saxena: > > +Christian Koenig > > > > On Tue, Jul 16, 2019 at 3:41 PM Sumit Saxena <sumit.saxena@broadcom.com> wrote: > >> In Resize BAR control register, bits[8:12] represents size of BAR. > >> As per PCIe specification, below is encoded values in register bits > >> to actual BAR size table: > >> > >> Bits BAR size > >> 0 1 MB > >> 1 2 MB > >> 2 4 MB > >> 3 8 MB > >> -- > >> > >> For 1 MB BAR size, BAR size bits should be set to 0 but incorrectly > >> these bits are set to "1f". > >> Latest megaraid_sas and mpt3sas adapters which support Resizable BAR > >> with 1 MB BAR size fails to initialize during system resume from S3 sleep. > >> > >> Fix: Correctly set BAR size bits to "0" for 1MB BAR size. > >> > >> CC: stable@vger.kernel.org # v4.16+ > >> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939 > >> Fixes: d3252ace0bc652a1a244455556b6a549f969bf99 ("PCI: Restore resized BAR state on resume") > >> Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com> > >> --- > >> drivers/pci/pci.c | 5 +++-- > >> 1 file changed, 3 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > >> index 8abc843..b651f32 100644 > >> --- a/drivers/pci/pci.c > >> +++ b/drivers/pci/pci.c > >> @@ -1417,12 +1417,13 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) > >> > >> for (i = 0; i < nbars; i++, pos += 8) { > >> struct resource *res; > >> - int bar_idx, size; > >> + int bar_idx, size, order; > >> > >> pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); > >> bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX; > >> res = pdev->resource + bar_idx; > >> - size = order_base_2((resource_size(res) >> 20) | 1) - 1; > >> + order = order_base_2((resource_size(res) >> 20) | 1); > >> + size = order ? order - 1 : 0; > > That actually doesn't looks like it is correct or at least it's > unnecessary complex. > > The " >> 20) | 1" seems like a copy & paste error from the code in > amdgpu where the BAR needs to larger than the VRAM size (which is not a > power of two). > > So just using "size = order_base_2(resource_size(res) >> 20);" should be > sufficient here. Agreed, thanks for feedback. I will send simplified version of the patch using just- "size = order_base_2(resource_size(res) >> 20);". Thanks, Sumit > > Regards, > Christian. > > >> ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE; > >> ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT; > >> pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); > >> -- > >> 1.8.3.1 > >> >
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 8abc843..b651f32 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1417,12 +1417,13 @@ static void pci_restore_rebar_state(struct pci_dev *pdev) for (i = 0; i < nbars; i++, pos += 8) { struct resource *res; - int bar_idx, size; + int bar_idx, size, order; pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl); bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX; res = pdev->resource + bar_idx; - size = order_base_2((resource_size(res) >> 20) | 1) - 1; + order = order_base_2((resource_size(res) >> 20) | 1); + size = order ? order - 1 : 0; ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE; ctrl |= size << PCI_REBAR_CTRL_BAR_SHIFT; pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
In Resize BAR control register, bits[8:12] represents size of BAR. As per PCIe specification, below is encoded values in register bits to actual BAR size table: Bits BAR size 0 1 MB 1 2 MB 2 4 MB 3 8 MB -- For 1 MB BAR size, BAR size bits should be set to 0 but incorrectly these bits are set to "1f". Latest megaraid_sas and mpt3sas adapters which support Resizable BAR with 1 MB BAR size fails to initialize during system resume from S3 sleep. Fix: Correctly set BAR size bits to "0" for 1MB BAR size. CC: stable@vger.kernel.org # v4.16+ Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=203939 Fixes: d3252ace0bc652a1a244455556b6a549f969bf99 ("PCI: Restore resized BAR state on resume") Signed-off-by: Sumit Saxena <sumit.saxena@broadcom.com> --- drivers/pci/pci.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)