[U-Boot,v1,6/7] mmc: fsl_esdhc: Add emmc hs200 support
diff mbox series

Message ID 20190716070912.33758-6-yinbo.zhu@nxp.com
State New
Delegated to: Prabhakar Kushwaha
Headers show
Series
  • [U-Boot,v1,1/7] mmc: fsl_esdhc: Add peripheral clock support
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Commit Message

Yinbo Zhu July 16, 2019, 7:09 a.m. UTC
Add eMMC hs200 mode support for increasing ls1028/ls1012/lx2160
eMMC work performance, but without tuning procedure which will
cause mmc doesn't work. and this should be TODO work.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
 drivers/mmc/fsl_esdhc.c | 34 +++++++++++++++++++---------------
 include/fsl_esdhc.h     |  4 ++++
 2 files changed, 23 insertions(+), 15 deletions(-)

Patch
diff mbox series

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 07318472a7..28d2312ef7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -395,10 +395,6 @@  static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 	esdhc_write32(&regs->cmdarg, cmd->cmdarg);
 	esdhc_write32(&regs->xfertyp, xfertyp);
 
-	if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) ||
-	    (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200))
-		flags = IRQSTAT_BRR;
-
 	/* Wait for the command to complete */
 	start = get_timer(0);
 	while (!(esdhc_read32(&regs->irqstat) & flags)) {
@@ -458,12 +454,6 @@  static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 #ifdef CONFIG_SYS_FSL_ESDHC_USE_PIO
 		esdhc_pio_read_write(priv, data);
 #else
-		flags = DATA_COMPLETE;
-		if ((cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK) ||
-		    (cmd->cmdidx == MMC_CMD_SEND_TUNING_BLOCK_HS200)) {
-			flags = IRQSTAT_BRR;
-		}
-
 		do {
 			irqstat = esdhc_read32(&regs->irqstat);
 
@@ -476,7 +466,7 @@  static int esdhc_send_cmd_common(struct fsl_esdhc_priv *priv, struct mmc *mmc,
 				err = -ECOMM;
 				goto out;
 			}
-		} while ((irqstat & flags) != flags);
+		} while ((irqstat & DATA_COMPLETE) != DATA_COMPLETE);
 
 		/*
 		 * Need invalidate the dcache here again to avoid any
@@ -517,7 +507,9 @@  static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 	int div = 1;
 	int pre_div = 2;
 	int ddr_pre_div = mmc->ddr_mode ? 2 : 1;
-	int sdhc_clk = priv->sdhc_clk;
+	unsigned int sdhc_clk = priv->sdhc_clk;
+	u32 time_out;
+	u32 value;
 	uint clk;
 
 	if (clock < mmc->cfg->f_min)
@@ -538,11 +530,18 @@  static void set_sysctl(struct fsl_esdhc_priv *priv, struct mmc *mmc, uint clock)
 
 	esdhc_clrsetbits32(&regs->sysctl, SYSCTL_CLOCK_MASK, clk);
 
-	udelay(10000);
+	time_out = 20;
+	value = PRSSTAT_SDSTB;
+	while (!(esdhc_read32(&regs->prsstat) & value)) {
+		if (time_out == 0) {
+			printf("fsl_esdhc: Internal clock never stabilised.\n");
+			break;
+		}
+		time_out--;
+		mdelay(1);
+	}
 
 	esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_CKEN);
-
-	priv->clock = clock;
 }
 
 #ifdef CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK
@@ -1024,6 +1023,8 @@  static int fsl_esdhc_probe(struct udevice *dev)
 		return ret;
 	}
 
+	mmc_of_parse(dev, &plat->cfg);
+
 	mmc = &plat->mmc;
 	mmc->cfg = &plat->cfg;
 	mmc->dev = dev;
@@ -1081,6 +1082,9 @@  static const struct dm_mmc_ops fsl_esdhc_ops = {
 	.get_cd		= fsl_esdhc_get_cd,
 	.send_cmd	= fsl_esdhc_send_cmd,
 	.set_ios	= fsl_esdhc_set_ios,
+#ifdef MMC_SUPPORTS_TUNING
+	.execute_tuning = fsl_esdhc_execute_tuning,
+#endif
 };
 #endif
 
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 7d7e946ab3..3f496b4cea 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -205,6 +205,10 @@  struct fsl_esdhc_cfg {
 int fsl_esdhc_mmc_init(bd_t *bis);
 int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg);
 void fdt_fixup_esdhc(void *blob, bd_t *bd);
+#ifdef MMC_SUPPORTS_TUNING
+static inline int fsl_esdhc_execute_tuning(struct udevice *dev,
+	uint32_t opcode) {return 0; }
+#endif
 #else
 static inline int fsl_esdhc_mmc_init(bd_t *bis) { return -ENOSYS; }
 static inline void fdt_fixup_esdhc(void *blob, bd_t *bd) {}