Patchwork [5/5] tcg: don't build cpu-exec.o, op_helper.o, or fpu/softloat.o when TCG disabled

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Submitter Anthony Liguori
Date Sept. 2, 2011, 9:48 p.m.
Message ID <1315000083-20576-6-git-send-email-aliguori@us.ibm.com>
Download mbox | patch
Permalink /patch/113215/
State New
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Comments

Anthony Liguori - Sept. 2, 2011, 9:48 p.m.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---
 Makefile.target         |    8 +++++---
 cpu-exec.c              |   19 ++++++++-----------
 cpus.c                  |   11 ++++++++++-
 exec.c                  |   29 ++++++++++++++++++++++-------
 softmmu_template.h      |   14 ++++++++++----
 target-i386/helper.c    |   18 ++++++++++++++++++
 target-i386/op_helper.c |   18 ------------------
 7 files changed, 73 insertions(+), 44 deletions(-)
Peter Maydell - Sept. 2, 2011, 11:26 p.m.
On 2 September 2011 22:48, Anthony Liguori <aliguori@us.ibm.com> wrote:

> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 5df40d4..793e467 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -32,6 +32,24 @@
>
>  //#define DEBUG_MMU
>
> +void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> +{
> +    CPU_LDoubleU temp;
> +
> +    temp.d = f;
> +    *pmant = temp.l.lower;
> +    *pexp = temp.l.upper;
> +}
> +
> +floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> +{
> +    CPU_LDoubleU temp;
> +
> +    temp.l.upper = upper;
> +    temp.l.lower = mant;
> +    return temp.d;
> +}
> +
>  /* NOTE: must be called outside the CPU execute loop */
>  void cpu_reset(CPUX86State *env)
>  {
> diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
> index 7d90ea7..59ddf44 100644
> --- a/target-i386/op_helper.c
> +++ b/target-i386/op_helper.c
> @@ -4694,24 +4694,6 @@ void helper_fxrstor(target_ulong ptr, int data64)
>     }
>  }
>
> -void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> -{
> -    CPU_LDoubleU temp;
> -
> -    temp.d = f;
> -    *pmant = temp.l.lower;
> -    *pexp = temp.l.upper;
> -}
> -
> -floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> -{
> -    CPU_LDoubleU temp;
> -
> -    temp.l.upper = upper;
> -    temp.l.lower = mant;
> -    return temp.d;
> -}
> -
>  #ifdef TARGET_X86_64
>
>  //#define DEBUG_MULDIV

If we're moving these two functions we should just move them into
target-i386/machine.c and mark them static. They're both only
called once each from that file, so there's no need for them to
be global functions. Or we could just roll them into get_fpreg()
and put_fpreg().

(I suspect their current placement is historical from when
target-i386 still supported two different flavours of double,
one for softfloat and one for softfloat-native.)

[Tangent, but spotted this in target-i386/machine.c:
union x86_longdouble {
    uint64_t mant;
    uint16_t exp;
};

...looks very suspicious that this is a union and not a struct...]

-- PMM
Blue Swirl - Sept. 3, 2011, 12:02 p.m.
On Fri, Sep 2, 2011 at 9:48 PM, Anthony Liguori <aliguori@us.ibm.com> wrote:
> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
> ---
>  Makefile.target         |    8 +++++---
>  cpu-exec.c              |   19 ++++++++-----------
>  cpus.c                  |   11 ++++++++++-
>  exec.c                  |   29 ++++++++++++++++++++++-------
>  softmmu_template.h      |   14 ++++++++++----
>  target-i386/helper.c    |   18 ++++++++++++++++++
>  target-i386/op_helper.c |   18 ------------------
>  7 files changed, 73 insertions(+), 44 deletions(-)
>
> diff --git a/Makefile.target b/Makefile.target
> index 0a786b4..00d3039 100644
> --- a/Makefile.target
> +++ b/Makefile.target
> @@ -67,9 +67,11 @@ all: $(PROGS) stap
>
>  #########################################################
>  # cpu emulator library
> -libobj-y = exec.o cpu-exec.o
> -libobj-y += fpu/softfloat.o
> -libobj-y += op_helper.o helper.o
> +libobj-y = exec.o
> +libobj-y += helper.o
> +libobj-$(CONFIG_TCG) += cpu-exec.o
> +libobj-$(CONFIG_TCG) += op_helper.o
> +libobj-$(CONFIG_TCG) += fpu/softfloat.o
>  libobj-$(CONFIG_TCG) += translate.o translate-all.o
>  libobj-$(CONFIG_TCG) += tcg/tcg.o tcg/optimize.o
>  ifeq ($(TARGET_BASE_ARCH), i386)
> diff --git a/cpu-exec.c b/cpu-exec.c
> index de0d716..c5e4e62 100644
> --- a/cpu-exec.c
> +++ b/cpu-exec.c
> @@ -26,11 +26,6 @@ int tb_invalidated_flag;
>
>  //#define CONFIG_DEBUG_EXEC
>
> -bool qemu_cpu_has_work(CPUState *env)
> -{
> -    return cpu_has_work(env);
> -}
> -
>  void cpu_loop_exit(CPUState *env)
>  {
>     env->current_tb = NULL;
> @@ -178,8 +173,6 @@ static void cpu_handle_debug_exception(CPUState *env)
>
>  /* main execution loop */
>
> -volatile sig_atomic_t exit_request;
> -
>  int cpu_exec(CPUState *env)
>  {
>     int ret, interrupt_request;
> @@ -506,8 +499,10 @@ int cpu_exec(CPUState *env)
>                 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
>                     /* restore flags in standard format */
>  #if defined(TARGET_I386)
> -                    env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP)
> -                        | (DF & DF_MASK);
> +                    env->eflags = env->eflags | (DF & DF_MASK);
> +                    if (tcg_enabled()) {

This and the next change are probably not needed if cpu-exec.c is only
compiled with CONFIG_TCG?

> +                        env->eflags |= cpu_cc_compute_all(env, CC_OP);
> +                    }
>                     log_cpu_state(env, X86_DUMP_CCOP);
>                     env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
>  #elif defined(TARGET_M68K)
> @@ -597,8 +592,10 @@ int cpu_exec(CPUState *env)
>
>  #if defined(TARGET_I386)
>     /* restore flags in standard format */
> -    env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP)
> -        | (DF & DF_MASK);
> +    env->eflags = env->eflags | (DF & DF_MASK);
> +    if (tcg_enabled()) {
> +        env->eflags |= cpu_cc_compute_all(env, CC_OP);
> +    }
>  #elif defined(TARGET_ARM)
>     /* XXX: Save/restore host fpu exception state?.  */
>  #elif defined(TARGET_UNICORE32)
> diff --git a/cpus.c b/cpus.c
> index 54c188c..0d7a8ee 100644
> --- a/cpus.c
> +++ b/cpus.c
> @@ -892,6 +892,7 @@ void vm_stop(int reason)
>     do_vm_stop(reason);
>  }
>
> +#ifdef CONFIG_TCG
>  static int tcg_cpu_exec(CPUState *env)
>  {
>     int ret;
> @@ -929,6 +930,12 @@ static int tcg_cpu_exec(CPUState *env)
>     }
>     return ret;
>  }
> +#else
> +static int tcg_cpu_exec(CPUState *env)
> +{
> +    return 0;
> +}
> +#endif
>
>  bool cpu_exec_all(void)
>  {
> @@ -950,8 +957,10 @@ bool cpu_exec_all(void)
>             if (kvm_enabled()) {
>                 r = kvm_cpu_exec(env);
>                 qemu_kvm_eat_signals(env);
> -            } else {
> +            } else if (tcg_enabled()) {
>                 r = tcg_cpu_exec(env);
> +            } else {
> +                r = 0;
>             }
>             if (r == EXCP_DEBUG) {
>                 cpu_handle_guest_debug(env);
> diff --git a/exec.c b/exec.c
> index c7decb9..731b7dc 100644
> --- a/exec.c
> +++ b/exec.c
> @@ -230,6 +230,13 @@ static int tlb_flush_count;
>  static int tb_flush_count;
>  static int tb_phys_invalidate_count;
>
> +volatile sig_atomic_t exit_request;
> +
> +bool qemu_cpu_has_work(CPUState *env)
> +{
> +    return cpu_has_work(env);
> +}
> +
>  #ifdef _WIN32
>  static void map_exec(void *addr, long size)
>  {
> @@ -901,7 +908,9 @@ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
>         invalidate_page_bitmap(p);
>     }
>
> -    tb_invalidated_flag = 1;
> +    if (tcg_enabled()) {
> +        tb_invalidated_flag = 1;
> +    }
>
>     /* remove the TB from the hash list */
>     h = tb_jmp_cache_hash_func(tb->pc);
> @@ -1002,8 +1011,10 @@ TranslationBlock *tb_gen_code(CPUState *env,
>         tb_flush(env);
>         /* cannot fail at this point */
>         tb = tb_alloc(pc);
> -        /* Don't forget to invalidate previous TB info.  */
> -        tb_invalidated_flag = 1;
> +        if (tcg_enabled()) {
> +            /* Don't forget to invalidate previous TB info.  */
> +            tb_invalidated_flag = 1;
> +        }
>     }
>     tc_ptr = code_gen_ptr;
>     tb->tc_ptr = tc_ptr;
> @@ -1127,7 +1138,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
>     }
>  #endif
>  #ifdef TARGET_HAS_PRECISE_SMC
> -    if (current_tb_modified) {
> +    if (current_tb_modified && tcg_enabled()) {
>         /* we generate a block containing just the instruction
>            modifying the memory. It will ensure that it cannot modify
>            itself */
> @@ -1216,7 +1227,7 @@ static void tb_invalidate_phys_page(tb_page_addr_t addr,
>     }
>     p->first_tb = NULL;
>  #ifdef TARGET_HAS_PRECISE_SMC
> -    if (current_tb_modified) {
> +    if (current_tb_modified && tcg_enabled()) {
>         /* we generate a block containing just the instruction
>            modifying the memory. It will ensure that it cannot modify
>            itself */
> @@ -3445,7 +3456,9 @@ static void check_watchpoint(int offset, int len_mask, int flags)
>                     cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
>                     tb_gen_code(env, pc, cs_base, cpu_flags, 1);
>                 }
> -                cpu_resume_from_signal(env, NULL);
> +                if (tcg_enabled()) {
> +                    cpu_resume_from_signal(env, NULL);
> +                }
>             }
>         } else {
>             wp->flags &= ~BP_WATCHPOINT_HIT;
> @@ -4721,7 +4734,9 @@ void cpu_io_recompile(CPUState *env, void *retaddr)
>        repeating the fault, which is horribly inefficient.
>        Better would be to execute just this insn uncached, or generate a
>        second new TB.  */
> -    cpu_resume_from_signal(env, NULL);
> +    if (tcg_enabled()) {
> +        cpu_resume_from_signal(env, NULL);
> +    }
>  }
>
>  #if !defined(CONFIG_USER_ONLY)
> diff --git a/softmmu_template.h b/softmmu_template.h
> index c2df9ec..c4065be 100644
> --- a/softmmu_template.h
> +++ b/softmmu_template.h
> @@ -131,7 +131,9 @@ DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
>         if ((addr & (DATA_SIZE - 1)) != 0)
>             do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
>  #endif
> -        tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
> +        if (tcg_enabled()) {
> +            tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
> +        }
>         goto redo;
>     }
>     return res;
> @@ -179,10 +181,12 @@ static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
>             addend = env->tlb_table[mmu_idx][index].addend;
>             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
>         }
> -    } else {
> +    } else if (tcg_enabled()) {
>         /* the page is not in the TLB : fill it */
>         tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
>         goto redo;
> +    } else {
> +        return 0;
>     }
>     return res;
>  }
> @@ -269,7 +273,9 @@ void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
>         if ((addr & (DATA_SIZE - 1)) != 0)
>             do_unaligned_access(addr, 1, mmu_idx, retaddr);
>  #endif
> -        tlb_fill(addr, 1, mmu_idx, retaddr);
> +        if (tcg_enabled()) {
> +            tlb_fill(addr, 1, mmu_idx, retaddr);
> +        }
>         goto redo;
>     }
>  }
> @@ -314,7 +320,7 @@ static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
>             addend = env->tlb_table[mmu_idx][index].addend;
>             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
>         }
> -    } else {
> +    } else if (tcg_enabled()) {
>         /* the page is not in the TLB : fill it */
>         tlb_fill(addr, 1, mmu_idx, retaddr);
>         goto redo;
> diff --git a/target-i386/helper.c b/target-i386/helper.c
> index 5df40d4..793e467 100644
> --- a/target-i386/helper.c
> +++ b/target-i386/helper.c
> @@ -32,6 +32,24 @@
>
>  //#define DEBUG_MMU
>
> +void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> +{
> +    CPU_LDoubleU temp;
> +
> +    temp.d = f;
> +    *pmant = temp.l.lower;
> +    *pexp = temp.l.upper;
> +}
> +
> +floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> +{
> +    CPU_LDoubleU temp;
> +
> +    temp.l.upper = upper;
> +    temp.l.lower = mant;
> +    return temp.d;
> +}
> +
>  /* NOTE: must be called outside the CPU execute loop */
>  void cpu_reset(CPUX86State *env)
>  {
> diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
> index 7d90ea7..59ddf44 100644
> --- a/target-i386/op_helper.c
> +++ b/target-i386/op_helper.c
> @@ -4694,24 +4694,6 @@ void helper_fxrstor(target_ulong ptr, int data64)
>     }
>  }
>
> -void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
> -{
> -    CPU_LDoubleU temp;
> -
> -    temp.d = f;
> -    *pmant = temp.l.lower;
> -    *pexp = temp.l.upper;
> -}
> -
> -floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
> -{
> -    CPU_LDoubleU temp;
> -
> -    temp.l.upper = upper;
> -    temp.l.lower = mant;
> -    return temp.d;
> -}
> -
>  #ifdef TARGET_X86_64
>
>  //#define DEBUG_MULDIV
> --
> 1.7.4.1
>
>
>

Patch

diff --git a/Makefile.target b/Makefile.target
index 0a786b4..00d3039 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -67,9 +67,11 @@  all: $(PROGS) stap
 
 #########################################################
 # cpu emulator library
-libobj-y = exec.o cpu-exec.o
-libobj-y += fpu/softfloat.o
-libobj-y += op_helper.o helper.o
+libobj-y = exec.o
+libobj-y += helper.o
+libobj-$(CONFIG_TCG) += cpu-exec.o
+libobj-$(CONFIG_TCG) += op_helper.o
+libobj-$(CONFIG_TCG) += fpu/softfloat.o
 libobj-$(CONFIG_TCG) += translate.o translate-all.o
 libobj-$(CONFIG_TCG) += tcg/tcg.o tcg/optimize.o
 ifeq ($(TARGET_BASE_ARCH), i386)
diff --git a/cpu-exec.c b/cpu-exec.c
index de0d716..c5e4e62 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -26,11 +26,6 @@  int tb_invalidated_flag;
 
 //#define CONFIG_DEBUG_EXEC
 
-bool qemu_cpu_has_work(CPUState *env)
-{
-    return cpu_has_work(env);
-}
-
 void cpu_loop_exit(CPUState *env)
 {
     env->current_tb = NULL;
@@ -178,8 +173,6 @@  static void cpu_handle_debug_exception(CPUState *env)
 
 /* main execution loop */
 
-volatile sig_atomic_t exit_request;
-
 int cpu_exec(CPUState *env)
 {
     int ret, interrupt_request;
@@ -506,8 +499,10 @@  int cpu_exec(CPUState *env)
                 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
                     /* restore flags in standard format */
 #if defined(TARGET_I386)
-                    env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP)
-                        | (DF & DF_MASK);
+                    env->eflags = env->eflags | (DF & DF_MASK);
+                    if (tcg_enabled()) {
+                        env->eflags |= cpu_cc_compute_all(env, CC_OP);
+                    }
                     log_cpu_state(env, X86_DUMP_CCOP);
                     env->eflags &= ~(DF_MASK | CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
 #elif defined(TARGET_M68K)
@@ -597,8 +592,10 @@  int cpu_exec(CPUState *env)
 
 #if defined(TARGET_I386)
     /* restore flags in standard format */
-    env->eflags = env->eflags | cpu_cc_compute_all(env, CC_OP)
-        | (DF & DF_MASK);
+    env->eflags = env->eflags | (DF & DF_MASK);
+    if (tcg_enabled()) {
+        env->eflags |= cpu_cc_compute_all(env, CC_OP);
+    }
 #elif defined(TARGET_ARM)
     /* XXX: Save/restore host fpu exception state?.  */
 #elif defined(TARGET_UNICORE32)
diff --git a/cpus.c b/cpus.c
index 54c188c..0d7a8ee 100644
--- a/cpus.c
+++ b/cpus.c
@@ -892,6 +892,7 @@  void vm_stop(int reason)
     do_vm_stop(reason);
 }
 
+#ifdef CONFIG_TCG
 static int tcg_cpu_exec(CPUState *env)
 {
     int ret;
@@ -929,6 +930,12 @@  static int tcg_cpu_exec(CPUState *env)
     }
     return ret;
 }
+#else
+static int tcg_cpu_exec(CPUState *env)
+{
+    return 0;
+}
+#endif
 
 bool cpu_exec_all(void)
 {
@@ -950,8 +957,10 @@  bool cpu_exec_all(void)
             if (kvm_enabled()) {
                 r = kvm_cpu_exec(env);
                 qemu_kvm_eat_signals(env);
-            } else {
+            } else if (tcg_enabled()) {
                 r = tcg_cpu_exec(env);
+            } else {
+                r = 0;
             }
             if (r == EXCP_DEBUG) {
                 cpu_handle_guest_debug(env);
diff --git a/exec.c b/exec.c
index c7decb9..731b7dc 100644
--- a/exec.c
+++ b/exec.c
@@ -230,6 +230,13 @@  static int tlb_flush_count;
 static int tb_flush_count;
 static int tb_phys_invalidate_count;
 
+volatile sig_atomic_t exit_request;
+
+bool qemu_cpu_has_work(CPUState *env)
+{
+    return cpu_has_work(env);
+}
+
 #ifdef _WIN32
 static void map_exec(void *addr, long size)
 {
@@ -901,7 +908,9 @@  void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr)
         invalidate_page_bitmap(p);
     }
 
-    tb_invalidated_flag = 1;
+    if (tcg_enabled()) {
+        tb_invalidated_flag = 1;
+    }
 
     /* remove the TB from the hash list */
     h = tb_jmp_cache_hash_func(tb->pc);
@@ -1002,8 +1011,10 @@  TranslationBlock *tb_gen_code(CPUState *env,
         tb_flush(env);
         /* cannot fail at this point */
         tb = tb_alloc(pc);
-        /* Don't forget to invalidate previous TB info.  */
-        tb_invalidated_flag = 1;
+        if (tcg_enabled()) {
+            /* Don't forget to invalidate previous TB info.  */
+            tb_invalidated_flag = 1;
+        }
     }
     tc_ptr = code_gen_ptr;
     tb->tc_ptr = tc_ptr;
@@ -1127,7 +1138,7 @@  void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
     }
 #endif
 #ifdef TARGET_HAS_PRECISE_SMC
-    if (current_tb_modified) {
+    if (current_tb_modified && tcg_enabled()) {
         /* we generate a block containing just the instruction
            modifying the memory. It will ensure that it cannot modify
            itself */
@@ -1216,7 +1227,7 @@  static void tb_invalidate_phys_page(tb_page_addr_t addr,
     }
     p->first_tb = NULL;
 #ifdef TARGET_HAS_PRECISE_SMC
-    if (current_tb_modified) {
+    if (current_tb_modified && tcg_enabled()) {
         /* we generate a block containing just the instruction
            modifying the memory. It will ensure that it cannot modify
            itself */
@@ -3445,7 +3456,9 @@  static void check_watchpoint(int offset, int len_mask, int flags)
                     cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags);
                     tb_gen_code(env, pc, cs_base, cpu_flags, 1);
                 }
-                cpu_resume_from_signal(env, NULL);
+                if (tcg_enabled()) {
+                    cpu_resume_from_signal(env, NULL);
+                }
             }
         } else {
             wp->flags &= ~BP_WATCHPOINT_HIT;
@@ -4721,7 +4734,9 @@  void cpu_io_recompile(CPUState *env, void *retaddr)
        repeating the fault, which is horribly inefficient.
        Better would be to execute just this insn uncached, or generate a
        second new TB.  */
-    cpu_resume_from_signal(env, NULL);
+    if (tcg_enabled()) {
+        cpu_resume_from_signal(env, NULL);
+    }
 }
 
 #if !defined(CONFIG_USER_ONLY)
diff --git a/softmmu_template.h b/softmmu_template.h
index c2df9ec..c4065be 100644
--- a/softmmu_template.h
+++ b/softmmu_template.h
@@ -131,7 +131,9 @@  DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
         if ((addr & (DATA_SIZE - 1)) != 0)
             do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
 #endif
-        tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+        if (tcg_enabled()) {
+            tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
+        }
         goto redo;
     }
     return res;
@@ -179,10 +181,12 @@  static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
             addend = env->tlb_table[mmu_idx][index].addend;
             res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend));
         }
-    } else {
+    } else if (tcg_enabled()) {
         /* the page is not in the TLB : fill it */
         tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr);
         goto redo;
+    } else {
+        return 0;
     }
     return res;
 }
@@ -269,7 +273,9 @@  void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr,
         if ((addr & (DATA_SIZE - 1)) != 0)
             do_unaligned_access(addr, 1, mmu_idx, retaddr);
 #endif
-        tlb_fill(addr, 1, mmu_idx, retaddr);
+        if (tcg_enabled()) {
+            tlb_fill(addr, 1, mmu_idx, retaddr);
+        }
         goto redo;
     }
 }
@@ -314,7 +320,7 @@  static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr,
             addend = env->tlb_table[mmu_idx][index].addend;
             glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val);
         }
-    } else {
+    } else if (tcg_enabled()) {
         /* the page is not in the TLB : fill it */
         tlb_fill(addr, 1, mmu_idx, retaddr);
         goto redo;
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 5df40d4..793e467 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -32,6 +32,24 @@ 
 
 //#define DEBUG_MMU
 
+void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
+{
+    CPU_LDoubleU temp;
+
+    temp.d = f;
+    *pmant = temp.l.lower;
+    *pexp = temp.l.upper;
+}
+
+floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
+{
+    CPU_LDoubleU temp;
+
+    temp.l.upper = upper;
+    temp.l.lower = mant;
+    return temp.d;
+}
+
 /* NOTE: must be called outside the CPU execute loop */
 void cpu_reset(CPUX86State *env)
 {
diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c
index 7d90ea7..59ddf44 100644
--- a/target-i386/op_helper.c
+++ b/target-i386/op_helper.c
@@ -4694,24 +4694,6 @@  void helper_fxrstor(target_ulong ptr, int data64)
     }
 }
 
-void cpu_get_fp80(uint64_t *pmant, uint16_t *pexp, floatx80 f)
-{
-    CPU_LDoubleU temp;
-
-    temp.d = f;
-    *pmant = temp.l.lower;
-    *pexp = temp.l.upper;
-}
-
-floatx80 cpu_set_fp80(uint64_t mant, uint16_t upper)
-{
-    CPU_LDoubleU temp;
-
-    temp.l.upper = upper;
-    temp.l.lower = mant;
-    return temp.d;
-}
-
 #ifdef TARGET_X86_64
 
 //#define DEBUG_MULDIV