[PULL,00/10] target-arm queue
mbox

Message ID 20190715134211.23063-1-peter.maydell@linaro.org
State New
Headers show

Pull-request

https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190715

Message

Peter Maydell July 15, 2019, 1:42 p.m. UTC
target-arm queue for rc1 -- these are all bug fixes.

thanks
-- PMM

The following changes since commit b9404bf592e7ba74180e1a54ed7a266ec6ee67f2:

  Merge remote-tracking branch 'remotes/dgilbert/tags/pull-hmp-20190715' into staging (2019-07-15 12:22:07 +0100)

are available in the Git repository at:

  https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190715

for you to fetch changes up to 51c9122e92b776a3f16af0b9282f1dc5012e2a19:

  target/arm: NS BusFault on vector table fetch escalates to NS HardFault (2019-07-15 14:17:04 +0100)

----------------------------------------------------------------
target-arm queue:
 * report ARMv8-A FP support for AArch32 -cpu max
 * hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory
 * hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[]
 * hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
 * hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO
 * hw/arm/virt: Fix non-secure flash mode
 * pl031: Correctly migrate state when using -rtc clock=host
 * fix regression that meant arm926 and arm1026 lost VFP
   double-precision support
 * v8M: NS BusFault on vector table fetch escalates to NS HardFault

----------------------------------------------------------------
Alex Bennée (1):
      target/arm: report ARMv8-A FP support for AArch32 -cpu max

David Engraf (1):
      hw/arm/virt: Fix non-secure flash mode

Peter Maydell (3):
      pl031: Correctly migrate state when using -rtc clock=host
      target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026
      target/arm: NS BusFault on vector table fetch escalates to NS HardFault

Philippe Mathieu-Daudé (5):
      hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs
      hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory
      hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[]
      hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
      hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO

 include/hw/timer/pl031.h |  2 ++
 hw/arm/virt.c            |  2 +-
 hw/core/machine.c        |  1 +
 hw/display/xlnx_dp.c     | 15 +++++---
 hw/ssi/mss-spi.c         |  8 ++++-
 hw/ssi/xilinx_spips.c    | 43 +++++++++++++++-------
 hw/timer/pl031.c         | 92 +++++++++++++++++++++++++++++++++++++++++++++---
 target/arm/cpu.c         | 16 +++++++++
 target/arm/m_helper.c    | 21 ++++++++---
 9 files changed, 174 insertions(+), 26 deletions(-)

Comments

Peter Maydell July 15, 2019, 2:18 p.m. UTC | #1
On Mon, 15 Jul 2019 at 14:42, Peter Maydell <peter.maydell@linaro.org> wrote:
>
> target-arm queue for rc1 -- these are all bug fixes.
>
> thanks
> -- PMM
>
> The following changes since commit b9404bf592e7ba74180e1a54ed7a266ec6ee67f2:
>
>   Merge remote-tracking branch 'remotes/dgilbert/tags/pull-hmp-20190715' into staging (2019-07-15 12:22:07 +0100)
>
> are available in the Git repository at:
>
>   https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20190715
>
> for you to fetch changes up to 51c9122e92b776a3f16af0b9282f1dc5012e2a19:
>
>   target/arm: NS BusFault on vector table fetch escalates to NS HardFault (2019-07-15 14:17:04 +0100)
>
> ----------------------------------------------------------------
> target-arm queue:
>  * report ARMv8-A FP support for AArch32 -cpu max
>  * hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory
>  * hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[]
>  * hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
>  * hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO
>  * hw/arm/virt: Fix non-secure flash mode
>  * pl031: Correctly migrate state when using -rtc clock=host
>  * fix regression that meant arm926 and arm1026 lost VFP
>    double-precision support
>  * v8M: NS BusFault on vector table fetch escalates to NS HardFault
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/4.1
for any user-visible changes.

-- PMM
no-reply@patchew.org July 15, 2019, 5:03 p.m. UTC | #2
Patchew URL: https://patchew.org/QEMU/20190715134211.23063-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190715134211.23063-1-peter.maydell@linaro.org
Type: series
Subject: [Qemu-devel] [PULL 00/10] target-arm queue

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20190715134211.23063-1-peter.maydell@linaro.org -> patchew/20190715134211.23063-1-peter.maydell@linaro.org
Switched to a new branch 'test'
374fdb936e target/arm: NS BusFault on vector table fetch escalates to NS HardFault
a30b1dad81 target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026
6d7051773f pl031: Correctly migrate state when using -rtc clock=host
93d58455ba hw/arm/virt: Fix non-secure flash mode
08594d9831 hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO
d4bfee6403 hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
521dcfc621 hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[]
28dc994a87 hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory
33d10d39bd hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs
4ad540cb00 target/arm: report ARMv8-A FP support for AArch32 -cpu max

=== OUTPUT BEGIN ===
1/10 Checking commit 4ad540cb003f (target/arm: report ARMv8-A FP support for AArch32 -cpu max)
2/10 Checking commit 33d10d39bd1e (hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs)
3/10 Checking commit 28dc994a8771 (hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory)
4/10 Checking commit 521dcfc62131 (hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[])
5/10 Checking commit d4bfee6403a6 (hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO)
6/10 Checking commit 08594d9831b4 (hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO)
7/10 Checking commit 93d58455baf6 (hw/arm/virt: Fix non-secure flash mode)
8/10 Checking commit 6d7051773f27 (pl031: Correctly migrate state when using -rtc clock=host)
ERROR: spaces required around that '*' (ctx:VxV)
#158: FILE: hw/timer/pl031.c:300:
+    .subsections = (const VMStateDescription*[]) {
                                             ^

total: 1 errors, 0 warnings, 146 lines checked

Patch 8/10 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/10 Checking commit a30b1dad815c (target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026)
10/10 Checking commit 374fdb936ee9 (target/arm: NS BusFault on vector table fetch escalates to NS HardFault)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190715134211.23063-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com
no-reply@patchew.org July 16, 2019, 8:55 a.m. UTC | #3
Patchew URL: https://patchew.org/QEMU/20190715134211.23063-1-peter.maydell@linaro.org/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [PULL 00/10] target-arm queue
Message-id: 20190715134211.23063-1-peter.maydell@linaro.org

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20190715134211.23063-1-peter.maydell@linaro.org -> patchew/20190715134211.23063-1-peter.maydell@linaro.org
Switched to a new branch 'test'
374fdb9 target/arm: NS BusFault on vector table fetch escalates to NS HardFault
a30b1da target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026
6d70517 pl031: Correctly migrate state when using -rtc clock=host
93d5845 hw/arm/virt: Fix non-secure flash mode
08594d9 hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO
d4bfee6 hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
521dcfc hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[]
28dc994 hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory
33d10d3 hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs
4ad540c target/arm: report ARMv8-A FP support for AArch32 -cpu max

=== OUTPUT BEGIN ===
1/10 Checking commit 4ad540cb003f (target/arm: report ARMv8-A FP support for AArch32 -cpu max)
2/10 Checking commit 33d10d39bd1e (hw/ssi/xilinx_spips: Convert lqspi_read() to read_with_attrs)
3/10 Checking commit 28dc994a8771 (hw/ssi/xilinx_spips: Avoid AXI writes to the LQSPI linear memory)
4/10 Checking commit 521dcfc62131 (hw/ssi/xilinx_spips: Avoid out-of-bound access to lqspi_buf[])
5/10 Checking commit d4bfee6403a6 (hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO)
6/10 Checking commit 08594d9831b4 (hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO)
7/10 Checking commit 93d58455baf6 (hw/arm/virt: Fix non-secure flash mode)
8/10 Checking commit 6d7051773f27 (pl031: Correctly migrate state when using -rtc clock=host)
ERROR: spaces required around that '*' (ctx:VxV)
#158: FILE: hw/timer/pl031.c:300:
+    .subsections = (const VMStateDescription*[]) {
                                             ^

total: 1 errors, 0 warnings, 146 lines checked

Patch 8/10 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/10 Checking commit a30b1dad815c (target/arm: Set VFP-related MVFR0 fields for arm926 and arm1026)
10/10 Checking commit 374fdb936ee9 (target/arm: NS BusFault on vector table fetch escalates to NS HardFault)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190715134211.23063-1-peter.maydell@linaro.org/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com