From patchwork Fri Sep 2 15:38:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 113162 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id C6C23B6F8A for ; Sat, 3 Sep 2011 01:38:39 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 07DFC281EC; Fri, 2 Sep 2011 17:38:38 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HCH7VntuLpBF; Fri, 2 Sep 2011 17:38:37 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 16557281CF; Fri, 2 Sep 2011 17:38:35 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0D4BF281D0 for ; Fri, 2 Sep 2011 17:38:33 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id dBxTdhS3ZNBv for ; Fri, 2 Sep 2011 17:38:32 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from AM1EHSOBE003.bigfish.com (am1ehsobe003.messaging.microsoft.com [213.199.154.206]) by theia.denx.de (Postfix) with ESMTPS id DE03E281CD for ; Fri, 2 Sep 2011 17:38:30 +0200 (CEST) Received: from mail85-am1-R.bigfish.com (10.3.201.243) by AM1EHSOBE003.bigfish.com (10.3.204.23) with Microsoft SMTP Server id 14.1.225.22; Fri, 2 Sep 2011 15:38:28 +0000 Received: from mail85-am1 (localhost.localdomain [127.0.0.1]) by mail85-am1-R.bigfish.com (Postfix) with ESMTP id C993CE802C3; Fri, 2 Sep 2011 15:38:28 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail85-am1 (localhost.localdomain [127.0.0.1]) by mail85-am1 (MessageSwitch) id 1314977908713039_12708; Fri, 2 Sep 2011 15:38:28 +0000 (UTC) Received: from AM1EHSMHS004.bigfish.com (unknown [10.3.201.254]) by mail85-am1.bigfish.com (Postfix) with ESMTP id A9DB51088051; Fri, 2 Sep 2011 15:38:28 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS004.bigfish.com (10.3.207.104) with Microsoft SMTP Server (TLS) id 14.1.225.22; Fri, 2 Sep 2011 15:38:27 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.323.2; Fri, 2 Sep 2011 10:38:25 -0500 Received: from fabio-Latitude-E6410.am.freescale.net ([10.29.240.191]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id p82FcNB0021139; Fri, 2 Sep 2011 10:38:24 -0500 (CDT) From: Fabio Estevam To: Date: Fri, 2 Sep 2011 12:38:54 -0300 Message-ID: <1314977935-2653-1-git-send-email-fabio.estevam@freescale.com> X-Mailer: git-send-email 1.7.1 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Fabio Estevam Subject: [U-Boot] [PATCH v2 1/2] ARM: mx25: Print the silicon revison X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Print the silicon revison during boot. Signed-off-by: Fabio Estevam --- Changes since v1: - Handle the unkown silicon revision in the same way as for mx31. arch/arm/cpu/arm926ejs/mx25/generic.c | 32 +++++++++++++++++++++++++++- arch/arm/include/asm/arch-mx25/imx-regs.h | 3 ++ 2 files changed, 33 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/arm926ejs/mx25/generic.c b/arch/arm/cpu/arm926ejs/mx25/generic.c index 76e4b5c..dca8d98 100644 --- a/arch/arm/cpu/arm926ejs/mx25/generic.c +++ b/arch/arm/cpu/arm926ejs/mx25/generic.c @@ -105,12 +105,40 @@ ulong imx_get_perclk (int clk) return lldiv (fref, div); } + +u32 get_cpu_rev(void) +{ + u32 srev; + u32 system_rev = 0x25000; + + /* read SREV register from IIM module */ + struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; + srev = readl(&iim->iim_srev); + + switch (srev) { + case 0x00: + system_rev |= CHIP_REV_1_0; + break; + case 0x01: + system_rev |= CHIP_REV_1_1; + break; + default: + system_rev |= 0x8000; + break; + } + + return system_rev; +} + #if defined(CONFIG_DISPLAY_CPUINFO) int print_cpuinfo (void) { char buf[32]; - - printf ("CPU: Freescale i.MX25 at %s MHz\n\n", + u32 cpurev = get_cpu_rev(); + + printf("CPU: Freescale i.MX25 rev%d.%d%s at %s MHz\n\n", + (cpurev & 0xF0) >> 4, (cpurev & 0x0F), + ((cpurev & 0x8000) ? " unknown" : ""), strmhz (buf, imx_get_armclk ())); return 0; } diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h index 7e34050..d0c6d00 100644 --- a/arch/arm/include/asm/arch-mx25/imx-regs.h +++ b/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -352,4 +352,7 @@ struct aips_regs { #define GPIO3_BASE_ADDR IMX_GPIO3_BASE #define GPIO4_BASE_ADDR IMX_GPIO4_BASE +#define CHIP_REV_1_0 0x10 +#define CHIP_REV_1_1 0x11 + #endif /* _IMX_REGS_H */