diff mbox series

[for,4.1,2/4] target/mips: Add missing 'break' for a case of MTHC0 handling

Message ID 1562931470-3700-4-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series target/mips: Fixes for 4.1 | expand

Commit Message

Aleksandar Markovic July 12, 2019, 11:37 a.m. UTC 
From: Aleksandar Markovic <amarkovic@wavecomp.com>

This was found by GCC 8.3 static analysis.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Philippe Mathieu-Daudé July 12, 2019, 1:52 p.m. UTC | #1 
Hi Aleksandar,

On 7/12/19 1:37 PM, Aleksandar Markovic wrote:
> From: Aleksandar Markovic <amarkovic@wavecomp.com>
> 
> This was found by GCC 8.3 static analysis.
> 

I think you can amend:

Fixes: 5fb2dcd1792
Reported-by: Stefan Weil <sw@weilnetz.de>

> Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
> ---
>  target/mips/translate.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/target/mips/translate.c b/target/mips/translate.c
> index 2be5e2d..59d4acd 100644
> --- a/target/mips/translate.c
> +++ b/target/mips/translate.c
> @@ -6745,6 +6745,7 @@ static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
>          default:
>              goto cp0_unimplemented;
>          }
> +        break;
>      case CP0_REGISTER_17:
>          switch (sel) {
>          case 0:
> 

Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>

Thanks,

Phil.
Aleksandar Markovic July 12, 2019, 2:04 p.m. UTC | #2 
> From: Philippe Mathieu-Daudé <philmd@redhat.com>
> 
> > From: Aleksandar Markovic <amarkovic@wavecomp.com>
> >
> > This was found by GCC 8.3 static analysis.
> >
> 
> I think you can amend:
> 
> Fixes: 5fb2dcd1792
> Reported-by: Stefan Weil <sw@weilnetz.de>
>

Yes, indeed. This will be added in the next version.

Thanks,
Aleksandar
diff mbox series

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2be5e2d..59d4acd 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -6745,6 +6745,7 @@  static void gen_mthc0(DisasContext *ctx, TCGv arg, int reg, int sel)
         default:
             goto cp0_unimplemented;
         }
+        break;
     case CP0_REGISTER_17:
         switch (sel) {
         case 0: