From patchwork Fri Sep 2 11:42:08 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 113129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id CA61AB6F72 for ; Fri, 2 Sep 2011 21:44:23 +1000 (EST) Received: (qmail 31274 invoked by alias); 2 Sep 2011 11:44:18 -0000 Received: (qmail 31265 invoked by uid 22791); 2 Sep 2011 11:44:17 -0000 X-SWARE-Spam-Status: No, hits=-2.0 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD, TW_CP X-Spam-Check-By: sourceware.org Received: from mail.codesourcery.com (HELO mail.codesourcery.com) (38.113.113.100) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 02 Sep 2011 11:43:59 +0000 Received: (qmail 876 invoked from network); 2 Sep 2011 11:43:58 -0000 Received: from unknown (HELO ?84.152.162.225?) (bernds@127.0.0.2) by mail.codesourcery.com with ESMTPA; 2 Sep 2011 11:43:58 -0000 Message-ID: <4E60C110.4030407@codesourcery.com> Date: Fri, 02 Sep 2011 13:42:08 +0200 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; U; Linux i686; en-US; rv:1.9.2.18) Gecko/20110801 Lightning/1.0b3pre Thunderbird/3.1.11 MIME-Version: 1.0 To: Ramana Radhakrishnan CC: GCC Patches Subject: Re: ARM: Emit conditions in push_multi References: <4E5F71A1.4050207@codesourcery.com> In-Reply-To: Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On 09/02/11 12:35, Ramana Radhakrishnan wrote: > On 1 September 2011 12:50, Bernd Schmidt wrote: >> Shrink-wrapping tests on ARM had one additional failure, which I could >> track down to a stmfd instruction being emitted where an stmhifd was >> intended. The following patch fixes the testcase; full tests running >> now. Ok? > > IIUC this should have been a result of conditionalizing the prologue > saves by the CCFSM state machine in ARM state Correct. > given that the push > instruction below doesn't have the conditional markers. Although I'm not sure how you arrived at this? Thumb insns can't be conditional anyway? > In which case > the routines to emit the asm for the VFP registers( vfp_output_fstmfd? > ) should also be checked for this issue. Hmm, ok. I found two more places which looked suspicious. New version, untested so far. What's "sfmfd"? That doesn't occur in my manual. Bernd * config/arm/arm.md (push_multi): Emit predicates. (push_fp_multi): Likewise. * config/arm/arm.c (vfp_output_fstmd): Likewise. Index: gcc/config/arm/arm.c =================================================================== --- gcc/config/arm/arm.c (revision 178135) +++ gcc/config/arm/arm.c (working copy) @@ -13084,7 +13096,7 @@ vfp_output_fstmd (rtx * operands) int base; int i; - strcpy (pattern, "fstmfdd\t%m0!, {%P1"); + strcpy (pattern, "fstmfdd%?\t%m0!, {%P1"); p = strlen (pattern); gcc_assert (GET_CODE (operands[1]) == REG); Index: gcc/config/arm/arm.md =================================================================== --- gcc/config/arm/arm.md (revision 178135) +++ gcc/config/arm/arm.md (working copy) @@ -10581,14 +10581,14 @@ (define_insn "*push_multi" In Thumb mode always use push, and the assembler will pick something appropriate. */ if (num_saves == 1 && TARGET_ARM) - output_asm_insn (\"str\\t%1, [%m0, #-4]!\", operands); + output_asm_insn (\"str%?\\t%1, [%m0, #-4]!\", operands); else { int i; char pattern[100]; if (TARGET_ARM) - strcpy (pattern, \"stmfd\\t%m0!, {%1\"); + strcpy (pattern, \"stm%(fd%)\\t%m0!, {%1\"); else strcpy (pattern, \"push\\t{%1\"); @@ -10631,7 +10631,7 @@ (define_insn "*push_fp_multi" { char pattern[100]; - sprintf (pattern, \"sfmfd\\t%%1, %d, [%%m0]!\", XVECLEN (operands[2], 0)); + sprintf (pattern, \"sfm%(fd%)\\t%%1, %d, [%%m0]!\", XVECLEN (operands[2], 0)); output_asm_insn (pattern, operands); return \"\"; }"