[08/10] cpu/msr: add MC*_CTL2 MSR registers
diff mbox series

Message ID 20190711174635.770-9-alex.hung@canonical.com
State Accepted
Headers show
Series
  • Updates architectural MSRs in IA32_MSRs
Related show

Commit Message

Alex Hung July 11, 2019, 5:46 p.m. UTC
Signed-off-by: Alex Hung <alex.hung@canonical.com>
---
 src/cpu/msr/msr.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Ivan Hu July 24, 2019, 7:48 a.m. UTC | #1
On 7/12/19 1:46 AM, Alex Hung wrote:
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
>   src/cpu/msr/msr.c | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 2ed1d183..30c94e93 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -424,6 +424,16 @@ static const msr_info IA32_MSRs[] = {
>   	{ "MC19_CTL2",			0x00000293,	0x0000000040007fffULL, NULL },
>   	{ "MC20_CTL2",			0x00000294,	0x0000000040007fffULL, NULL },
>   	{ "MC21_CTL2",			0x00000295,	0x0000000040007fffULL, NULL },
> +	{ "MC22_CTL2",			0x00000296,	0x0000000040007fffULL, NULL },
> +	{ "MC23_CTL2",			0x00000297,	0x0000000040007fffULL, NULL },
> +	{ "MC24_CTL2",			0x00000298,	0x0000000040007fffULL, NULL },
> +	{ "MC25_CTL2",			0x00000299,	0x0000000040007fffULL, NULL },
> +	{ "MC26_CTL2",			0x0000029a,	0x0000000040007fffULL, NULL },
> +	{ "MC27_CTL2",			0x0000029b,	0x0000000040007fffULL, NULL },
> +	{ "MC28_CTL2",			0x0000029c,	0x0000000040007fffULL, NULL },
> +	{ "MC29_CTL2",			0x0000029d,	0x0000000040007fffULL, NULL },
> +	{ "MC30_CTL2",			0x0000029e,	0x0000000040007fffULL, NULL },
> +	{ "MC31_CTL2",			0x0000029f,	0x0000000040007fffULL, NULL },
>   	{ "MTRR_DEF_TYPE",		0x000002ff,	0x0000000000000c0fULL, NULL },
>   	{ "PEBS_ENABLE",		0x000003f1,	0x0000000000000001ULL, NULL },
>   	{ "VMX_BASIC",			0x00000480,	0xffffffffffffffffULL, NULL },
> 

Acked-by: Ivan Hu <ivan.hu@canonical.com>
Colin Ian King July 24, 2019, 3:06 p.m. UTC | #2
On 11/07/2019 18:46, Alex Hung wrote:
> Signed-off-by: Alex Hung <alex.hung@canonical.com>
> ---
>  src/cpu/msr/msr.c | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
> index 2ed1d183..30c94e93 100644
> --- a/src/cpu/msr/msr.c
> +++ b/src/cpu/msr/msr.c
> @@ -424,6 +424,16 @@ static const msr_info IA32_MSRs[] = {
>  	{ "MC19_CTL2",			0x00000293,	0x0000000040007fffULL, NULL },
>  	{ "MC20_CTL2",			0x00000294,	0x0000000040007fffULL, NULL },
>  	{ "MC21_CTL2",			0x00000295,	0x0000000040007fffULL, NULL },
> +	{ "MC22_CTL2",			0x00000296,	0x0000000040007fffULL, NULL },
> +	{ "MC23_CTL2",			0x00000297,	0x0000000040007fffULL, NULL },
> +	{ "MC24_CTL2",			0x00000298,	0x0000000040007fffULL, NULL },
> +	{ "MC25_CTL2",			0x00000299,	0x0000000040007fffULL, NULL },
> +	{ "MC26_CTL2",			0x0000029a,	0x0000000040007fffULL, NULL },
> +	{ "MC27_CTL2",			0x0000029b,	0x0000000040007fffULL, NULL },
> +	{ "MC28_CTL2",			0x0000029c,	0x0000000040007fffULL, NULL },
> +	{ "MC29_CTL2",			0x0000029d,	0x0000000040007fffULL, NULL },
> +	{ "MC30_CTL2",			0x0000029e,	0x0000000040007fffULL, NULL },
> +	{ "MC31_CTL2",			0x0000029f,	0x0000000040007fffULL, NULL },
>  	{ "MTRR_DEF_TYPE",		0x000002ff,	0x0000000000000c0fULL, NULL },
>  	{ "PEBS_ENABLE",		0x000003f1,	0x0000000000000001ULL, NULL },
>  	{ "VMX_BASIC",			0x00000480,	0xffffffffffffffffULL, NULL },
> 
Acked-by: Colin Ian King <colin.king@canonical.com>

Patch
diff mbox series

diff --git a/src/cpu/msr/msr.c b/src/cpu/msr/msr.c
index 2ed1d183..30c94e93 100644
--- a/src/cpu/msr/msr.c
+++ b/src/cpu/msr/msr.c
@@ -424,6 +424,16 @@  static const msr_info IA32_MSRs[] = {
 	{ "MC19_CTL2",			0x00000293,	0x0000000040007fffULL, NULL },
 	{ "MC20_CTL2",			0x00000294,	0x0000000040007fffULL, NULL },
 	{ "MC21_CTL2",			0x00000295,	0x0000000040007fffULL, NULL },
+	{ "MC22_CTL2",			0x00000296,	0x0000000040007fffULL, NULL },
+	{ "MC23_CTL2",			0x00000297,	0x0000000040007fffULL, NULL },
+	{ "MC24_CTL2",			0x00000298,	0x0000000040007fffULL, NULL },
+	{ "MC25_CTL2",			0x00000299,	0x0000000040007fffULL, NULL },
+	{ "MC26_CTL2",			0x0000029a,	0x0000000040007fffULL, NULL },
+	{ "MC27_CTL2",			0x0000029b,	0x0000000040007fffULL, NULL },
+	{ "MC28_CTL2",			0x0000029c,	0x0000000040007fffULL, NULL },
+	{ "MC29_CTL2",			0x0000029d,	0x0000000040007fffULL, NULL },
+	{ "MC30_CTL2",			0x0000029e,	0x0000000040007fffULL, NULL },
+	{ "MC31_CTL2",			0x0000029f,	0x0000000040007fffULL, NULL },
 	{ "MTRR_DEF_TYPE",		0x000002ff,	0x0000000000000c0fULL, NULL },
 	{ "PEBS_ENABLE",		0x000003f1,	0x0000000000000001ULL, NULL },
 	{ "VMX_BASIC",			0x00000480,	0xffffffffffffffffULL, NULL },