From patchwork Mon Jul 8 01:39:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1128836 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="oyvBJhNH"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45hpZM2w97z9s3l for ; Mon, 8 Jul 2019 12:00:43 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id C8720C21DCA; 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Mon, 8 Jul 2019 01:39:42 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::2023:c0e5:8a63:2e47]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::2023:c0e5:8a63:2e47%5]) with mapi id 15.20.2052.020; Mon, 8 Jul 2019 01:39:41 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH V2 25/51] imx8m: soc: enable SCTR clock before timer init Thread-Index: AQHVNS4DOufXzPUmGEGrrmoB3XtGXQ== Date: Mon, 8 Jul 2019 01:39:41 +0000 Message-ID: <20190708015333.20411-26-peng.fan@nxp.com> References: <20190708015333.20411-1-peng.fan@nxp.com> In-Reply-To: <20190708015333.20411-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK0PR01CA0059.apcprd01.prod.exchangelabs.com (2603:1096:203:a6::23) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 8bb6972a-bdce-4fcb-5993-08d70345259d x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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SFP:1101; SCL:1; SRVR:AM0PR04MB4018; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: /OKtJnr0DgVbe4P/lll8ZHYLPE9WO2ZbGZOeOJmI+xV/QSOaiIXLBRhTibZVV4oI0N2jQLWfA5YyIpoW7mVHAzr/5eJ8oQ9iAoowDDzMkLMSFkCn2BVLh8ZymjmKVfzIjPOSA14AypRP9IcN8QDpijp8zjyXaW74wrIyjCXuZL3WZslXmiAlAqZW1b+RNZvWkyL55ewhGwhbFvDsiCt63imN5t/CNyZCCML4gmjou9Gr/JmzhaZ4rXArtX7drHJtR1/gaPT/K5QVJA0LLMEYk5oCzgE+g7SS0ko9h1bqEBAX/OiGL9y4WxvsvRGsP5xpvXQFCIy1RI+homCHZ1rSTJkAuBcmod2BGolTwvZnhrnjxG3K0hGpqjEZ+CQ+7aEyH6e4Tu908aTIBCDsz2Xtms9FisUbtI+DZ9ysXTUR85o= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8bb6972a-bdce-4fcb-5993-08d70345259d X-MS-Exchange-CrossTenant-originalarrivaltime: 08 Jul 2019 01:39:41.8768 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: peng.fan@nxp.com X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4018 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH V2 25/51] imx8m: soc: enable SCTR clock before timer init X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" To i.MX8MM SCTR clock is disabled by ROM, so before timer init need to enable it. To i.MX8MQ, it does not hurt the clock is enabled again. Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/soc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 5b7300087d..c4d842f097 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -235,6 +235,12 @@ static void imx_set_wdog_powerdown(bool enable) int arch_cpu_init(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; + /* + * ROM might disable clock for SCTR, + * enable the clock before timer_init. + */ + if (IS_ENABLED(CONFIG_SPL_BUILD)) + clock_enable(CCGR_SCTR, 1); /* * Init timer at very early state, because sscg pll setting * will use it