diff mbox series

[U-Boot,V2,25/51] imx8m: soc: enable SCTR clock before timer init

Message ID 20190708015333.20411-26-peng.fan@nxp.com
State Rejected
Delegated to: Stefano Babic
Headers show
Series Support i.MX8MM/N | expand

Commit Message

Peng Fan July 8, 2019, 1:39 a.m. UTC 
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5b7300087d..c4d842f097 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -235,6 +235,12 @@  static void imx_set_wdog_powerdown(bool enable)
 int arch_cpu_init(void)
 {
 	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	/*
+	 * ROM might disable clock for SCTR,
+	 * enable the clock before timer_init.
+	 */
+	if (IS_ENABLED(CONFIG_SPL_BUILD))
+		clock_enable(CCGR_SCTR, 1);
 	/*
 	 * Init timer at very early state, because sscg pll setting
 	 * will use it