[U-Boot,V2,37/51] imx8mn: set BYPASS ID SWAP to avoid AXI bus errors
diff mbox series

Message ID 20190708015333.20411-38-peng.fan@nxp.com
State Rejected
Delegated to: Stefano Babic
Headers show
Series
  • Support i.MX8MM/N
Related show

Commit Message

Peng Fan July 8, 2019, 1:40 a.m. UTC
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch
diff mbox series

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index a8cb6ca31c..98896893c9 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -59,7 +59,7 @@  void enable_tzc380(void)
 	/* Enable TZASC and lock setting */
 	setbits_le32(&gpr->gpr[10], GPR_TZASC_EN);
 	setbits_le32(&gpr->gpr[10], GPR_TZASC_EN_LOCK);
-	if (IS_ENABLED(CONFIG_IMX8MM))
+	if (is_imx8mm() || is_imx8mn())
 		setbits_le32(&gpr->gpr[10], BIT(1));
 	/*
 	 * set Region 0 attribute to allow secure and non-secure