| Message ID | 1562500677-20128-1-git-send-email-dmladjenovic@wavecomp.com |
|---|---|
| State | New |
| Headers | show |
| Series | [RFC,PR89245] Check REG_CALL_DECL note during the tail-merging | expand |
Dragan Mladjenovic <dmladjenovic@wavecomp.com> writes: > From: "Dragan Mladjenovic" <dmladjenovic@wavecomp.com> > > This patch prevents merging of CALL instructions that that have different > REG_CALL_DECL notes attached to them. > > On most architectures this is not an important distinction. Usually instruction patterns > for calls to different functions reference different SYMBOL_REF-s, so they won't match. > On MIPS PIC calls get split into an got_load/*call_internal pair where the latter represents > indirect register call w/o SYMBOL_REF attached (until machine_reorg pass). The bugzilla issue > had such two internal_call-s merged despite the fact that they had different register usage > information assigned by ipa-ra. > > The check could be improved by checking if ipa-ra has actually assigned two different > register sets for two functions involved, but I chose to only do a quick rtx_equal check. Yeah, I think doing it that would be better (and maybe simpler?). It should just be a case of: get_call_reg_set_usage (i1, &i1_used_regs, call_used_reg_set); get_call_reg_set_usage (i2, &i2_used_regs, call_used_reg_set); and then checking that i1_used_regs and i2_used_regs are equal. Thanks, Richard
diff --git a/gcc/cfgcleanup.c b/gcc/cfgcleanup.c index 992912c..9903249 100644 --- a/gcc/cfgcleanup.c +++ b/gcc/cfgcleanup.c @@ -1224,6 +1224,15 @@ old_insns_match_p (int mode ATTRIBUTE_UNUSED, rtx_insn *i1, rtx_insn *i2) } } } + + n1 = find_reg_note (i1, REG_CALL_DECL, 0); + n2 = find_reg_note (i2, REG_CALL_DECL, 0); + + if (!n1 && n2) + return dir_none; + + if (n1 && (!n2 || !rtx_equal_p (XEXP (n1, 0), XEXP (n2, 0)))) + return dir_none; } /* If both i1 and i2 are frame related, verify all the CFA notes diff --git a/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr.c b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr.c new file mode 100644 index 0000000..a4c0c47 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/cfgcleanup-jalr.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-mabicalls -fpic" } */ + +extern void foo (void*); + +extern void bar (void*); + +void test (void* p) +{ + if (!p) + foo(p); + else + bar(p); +} + +/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,foo" } } */ +/* { dg-final { scan-assembler "\\\.reloc\t1f,R_MIPS_JALR,bar" } } */
From: "Dragan Mladjenovic" <dmladjenovic@wavecomp.com> This patch prevents merging of CALL instructions that that have different REG_CALL_DECL notes attached to them. On most architectures this is not an important distinction. Usually instruction patterns for calls to different functions reference different SYMBOL_REF-s, so they won't match. On MIPS PIC calls get split into an got_load/*call_internal pair where the latter represents indirect register call w/o SYMBOL_REF attached (until machine_reorg pass). The bugzilla issue had such two internal_call-s merged despite the fact that they had different register usage information assigned by ipa-ra. The check could be improved by checking if ipa-ra has actually assigned two different register sets for two functions involved, but I chose to only do a quick rtx_equal check. gcc/ChangeLog: 2019-07-07 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * cfgcleanup.c (old_insns_match_p): Check for equal REG_CALL_DECL notes on call instructions. gcc/testsuite/ChangeLog: 2019-07-07 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * gcc.target/mips/cfgcleanup-jalr.c: New test. --- gcc/cfgcleanup.c | 9 +++++++++ gcc/testsuite/gcc.target/mips/cfgcleanup-jalr.c | 17 +++++++++++++++++ 2 files changed, 26 insertions(+) create mode 100644 gcc/testsuite/gcc.target/mips/cfgcleanup-jalr.c