diff mbox series

[07/11,riscv] Fix ambiguous .md attribute uses

Message ID mpttvc0wlui.fsf@arm.com
State New
Headers show
Series Diagnose ambiguous .md attribute uses | expand

Commit Message

Richard Sandiford July 5, 2019, 3:19 p.m. UTC 
This patch is part of a series that fixes ambiguous attribute
uses in .md files, i.e. cases in which attributes didn't use
<ITER:ATTR> to specify an iterator, and in which <ATTR> could
have different values depending on the iterator chosen.

No behavioural change -- produces the same code as before.


2019-07-05  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/riscv/pic.md (*local_pic_load_s<mode>)
	(*local_pic_load_u<mode>): Explicitly specify the mode iterator
	referenced by <mode>, giving...
	(*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these.
	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>)
	(*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly
	use <X:MODE> for the mode attribute.

Comments

Jim Wilson July 8, 2019, 4:38 a.m. UTC | #1 
On Fri, Jul 5, 2019 at 11:19 PM Richard Sandiford
<richard.sandiford@arm.com> wrote:
> gcc/
>         * config/riscv/pic.md (*local_pic_load_s<mode>)
>         (*local_pic_load_u<mode>): Explicitly specify the mode iterator
>         referenced by <mode>, giving...
>         (*local_pic_load_s<SUBX:mode>, *local_pic_load_u<SUBX:mode>): ...these.
>         * config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>)
>         (*slt<u>_<X:mode><GPR:mode>, *sle<u>_<X:mode><GPR:mode>): Explicitly
>         use <X:MODE> for the mode attribute.

OK.

Jim
diff mbox series

Patch

Index: gcc/config/riscv/pic.md
===================================================================
--- gcc/config/riscv/pic.md	2019-03-08 18:15:38.084735089 +0000
+++ gcc/config/riscv/pic.md	2019-07-05 15:07:46.695310028 +0100
@@ -29,14 +29,14 @@  (define_insn "*local_pic_load<mode>"
   "<default_load>\t%0,%1"
   [(set (attr "length") (const_int 8))])
 
-(define_insn "*local_pic_load_s<mode>"
+(define_insn "*local_pic_load_s<SUBX:mode>"
   [(set (match_operand:SUPERQI 0 "register_operand" "=r")
 	(sign_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
   "USE_LOAD_ADDRESS_MACRO (operands[1])"
   "<SUBX:load>\t%0,%1"
   [(set (attr "length") (const_int 8))])
 
-(define_insn "*local_pic_load_u<mode>"
+(define_insn "*local_pic_load_u<SUBX:mode>"
   [(set (match_operand:SUPERQI 0 "register_operand" "=r")
 	(zero_extend:SUPERQI (mem:SUBX (match_operand 1 "absolute_symbolic_operand" ""))))]
   "USE_LOAD_ADDRESS_MACRO (operands[1])"
Index: gcc/config/riscv/riscv.md
===================================================================
--- gcc/config/riscv/riscv.md	2019-07-01 09:37:06.632529410 +0100
+++ gcc/config/riscv/riscv.md	2019-07-05 15:07:46.699309994 +0100
@@ -2054,7 +2054,7 @@  (define_insn "*sge<u>_<X:mode><GPR:mode>
   ""
   "slt%i2<u>\t%0,zero,%1"
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 (define_insn "*slt<u>_<X:mode><GPR:mode>"
   [(set (match_operand:GPR           0 "register_operand" "= r")
@@ -2063,7 +2063,7 @@  (define_insn "*slt<u>_<X:mode><GPR:mode>
   ""
   "slt%i2<u>\t%0,%1,%2"
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 (define_insn "*sle<u>_<X:mode><GPR:mode>"
   [(set (match_operand:GPR           0 "register_operand" "=r")
@@ -2075,7 +2075,7 @@  (define_insn "*sle<u>_<X:mode><GPR:mode>
   return "slt%i2<u>\t%0,%1,%2";
 }
   [(set_attr "type" "slt")
-   (set_attr "mode" "<MODE>")])
+   (set_attr "mode" "<X:MODE>")])
 
 ;;
 ;;  ....................