From patchwork Wed Jul 3 21:07:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eduardo Habkost X-Patchwork-Id: 1127186 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=redhat.com Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45fDY93PJGz9s4V for ; Thu, 4 Jul 2019 07:20:45 +1000 (AEST) Received: from localhost ([::1]:40736 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1himgF-0006do-Gs for incoming@patchwork.ozlabs.org; Wed, 03 Jul 2019 17:20:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38009) by lists.gnu.org with esmtp (Exim 4.86_2) (envelope-from ) id 1himUt-00066P-Q0 for qemu-devel@nongnu.org; Wed, 03 Jul 2019 17:09:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1himUs-0006lv-FW for qemu-devel@nongnu.org; Wed, 03 Jul 2019 17:08:59 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47156) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1himUs-0006lI-7f for qemu-devel@nongnu.org; Wed, 03 Jul 2019 17:08:58 -0400 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5F58F90C7A; Wed, 3 Jul 2019 21:08:57 +0000 (UTC) Received: from localhost (ovpn-116-30.gru2.redhat.com [10.97.116.30]) by smtp.corp.redhat.com (Postfix) with ESMTP id E11F683788; Wed, 3 Jul 2019 21:08:56 +0000 (UTC) From: Eduardo Habkost To: Peter Maydell , Paolo Bonzini , qemu-devel@nongnu.org, Marcel Apfelbaum , Richard Henderson Date: Wed, 3 Jul 2019 18:07:49 -0300 Message-Id: <20190703210821.27550-12-ehabkost@redhat.com> In-Reply-To: <20190703210821.27550-1-ehabkost@redhat.com> References: <20190703210821.27550-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Wed, 03 Jul 2019 21:08:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL v5 11/43] i386: Add die-level cpu topology to x86CPU on PCMachine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Like Xu Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Like Xu The die-level as the first PC-specific cpu topology is added to the leagcy cpu topology model, which has one die per package implicitly and only the numbers of sockets/cores/threads are configurable. In the new model with die-level support, the total number of logical processors (including offline) on board will be calculated as: #cpus = #sockets * #dies * #cores * #threads and considering compatibility, the default value for #dies would be initialized to one in x86_cpu_initfn() and pc_machine_initfn(). Signed-off-by: Like Xu Message-Id: <20190612084104.34984-2-like.xu@linux.intel.com> Reviewed-by: Eduardo Habkost Signed-off-by: Eduardo Habkost --- include/hw/i386/pc.h | 2 ++ target/i386/cpu.h | 2 ++ hw/i386/pc.c | 9 +++++++-- target/i386/cpu.c | 1 + 4 files changed, 12 insertions(+), 2 deletions(-) diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 884e35b9b2..764996e6b4 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -24,6 +24,7 @@ * PCMachineState: * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling * @boot_cpus: number of present VCPUs + * @smp_dies: number of dies per one package */ struct PCMachineState { /*< private >*/ @@ -59,6 +60,7 @@ struct PCMachineState { bool apic_xrupt_override; unsigned apic_id_limit; uint16_t boot_cpus; + unsigned smp_dies; /* NUMA information: */ uint64_t numa_nodes; diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 93345792f4..14c19e61b1 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1385,6 +1385,8 @@ typedef struct CPUX86State { uint64_t xss; TPRAccess tpr_access_type; + + unsigned nr_dies; } CPUX86State; struct kvm_msrs; diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 73de30cc20..e18b1bade2 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -2306,9 +2306,13 @@ static void pc_cpu_pre_plug(HotplugHandler *hotplug_dev, return; } - /* if APIC ID is not set, set it based on socket/core/thread properties */ + /* + * If APIC ID is not set, + * set it based on socket/die/core/thread properties. + */ if (cpu->apic_id == UNASSIGNED_APIC_ID) { - int max_socket = (ms->smp.max_cpus - 1) / smp_threads / smp_cores; + int max_socket = (ms->smp.max_cpus - 1) / + smp_threads / smp_cores / pcms->smp_dies; if (cpu->socket_id < 0) { error_setg(errp, "CPU socket-id is not set"); @@ -2619,6 +2623,7 @@ static void pc_machine_initfn(Object *obj) pcms->smbus_enabled = true; pcms->sata_enabled = true; pcms->pit_enabled = true; + pcms->smp_dies = 1; pc_system_flash_create(pcms); } diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 4b5cd49338..8ef3063140 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5639,6 +5639,7 @@ static void x86_cpu_initfn(Object *obj) CPUX86State *env = &cpu->env; FeatureWord w; + env->nr_dies = 1; cpu_set_cpustate_pointers(cpu); object_property_add(obj, "family", "int",