| Message ID | 1562147167-27330-5-git-send-email-ye.li@nxp.com |
|---|---|
| State | Superseded |
| Delegated to: | Stefano Babic |
| Headers | show |
| Series | [U-Boot,v2,1/7] imx8: Add lpcg driver for iMX8QM/QXP | expand |
Hi Ye, On Wed, Jul 3, 2019 at 4:52 AM Ye Li <ye.li@nxp.com> wrote: > > Add support for more clocks used by iMX8 from DTB: > ref_clock, tx_2x_clock, ahb_clock > And update get clock rate interface to support multiple fec ports. It seems the feature to support multiple ports should be independent of adding the extra needed clocks. I think they should be two separate patches. Thanks, -Joe > > Signed-off-by: Ye Li <ye.li@nxp.com> > --- > Changes in v2: > - None > > drivers/net/fec_mxc.c | 47 ++++++++++++++++++++++++++++++++++++++--------- > drivers/net/fec_mxc.h | 1 + > 2 files changed, 39 insertions(+), 9 deletions(-) > > diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c > index d7c0809..6d485f1 100644 > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -6,7 +6,6 @@ > * (C) Copyright 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> > * (C) Copyright 2007 Pengutronix, Juergen Beisert <j.beisert@pengutronix.de> > */ > - > #include <common.h> > #include <dm.h> > #include <environment.h> > @@ -132,9 +131,9 @@ static int fec_get_clk_rate(void *udev, int idx) > > dev = udev; > if (!dev) { > - ret = uclass_get_device(UCLASS_ETH, idx, &dev); > + ret = uclass_get_device_by_seq(UCLASS_ETH, idx, &dev); > if (ret < 0) { > - debug("Can't get FEC udev: %d\n", ret); > + debug("Can't get FEC udev%d: %d\n", idx, ret); > return ret; > } > } > @@ -149,7 +148,7 @@ static int fec_get_clk_rate(void *udev, int idx) > #endif > } > > -static void fec_mii_setspeed(struct ethernet_regs *eth) > +static void fec_mii_setspeed(struct ethernet_regs *eth, int idx) > { > /* > * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock > @@ -171,7 +170,7 @@ static void fec_mii_setspeed(struct ethernet_regs *eth) > u32 hold; > int ret; > > - ret = fec_get_clk_rate(NULL, 0); > + ret = fec_get_clk_rate(NULL, idx); > if (ret < 0) { > printf("Can't find FEC0 clk rate: %d\n", ret); > return; > @@ -593,7 +592,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd) > fec_reg_setup(fec); > > if (fec->xcv_type != SEVENWIRE) > - fec_mii_setspeed(fec->bus->priv); > + fec_mii_setspeed(fec->bus->priv, fec->dev_id); > > /* Set Opcode/Pause Duration Register */ > writel(0x00010020, &fec->eth->op_pause); /* FIXME 0xffff0020; */ > @@ -1073,7 +1072,7 @@ struct mii_dev *fec_get_miibus(ulong base_addr, int dev_id) > free(bus); > return NULL; > } > - fec_mii_setspeed(eth); > + fec_mii_setspeed(eth, dev_id); > return bus; > } > > @@ -1142,7 +1141,7 @@ static int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, > fec_set_dev_name(edev->name, dev_id); > fec->dev_id = (dev_id == -1) ? 0 : dev_id; > fec->bus = bus; > - fec_mii_setspeed(bus->priv); > + fec_mii_setspeed(bus->priv, fec->dev_id); > #ifdef CONFIG_PHYLIB > fec->phydev = phydev; > phy_connect_dev(phydev, edev); > @@ -1324,6 +1323,7 @@ static int fecmxc_probe(struct udevice *dev) > int ret; > > if (IS_ENABLED(CONFIG_IMX8)) { > + struct clk ref_clk, clk_2x_txclk; > ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); > if (ret < 0) { > debug("Can't get FEC ipg clk: %d\n", ret); > @@ -1335,6 +1335,35 @@ static int fecmxc_probe(struct udevice *dev) > return ret; > } > > + ret = clk_get_by_name(dev, "ahb", &priv->ahb_clk); > + if (ret < 0) { > + debug("Can't get FEC ahb clk: %d\n", ret); > + return ret; > + } > + ret = clk_enable(&priv->ahb_clk); > + if (ret < 0) { > + debug("Can't enable FEC ahb clk: %d\n", ret); > + return ret; > + } > + > + ret = clk_get_by_name(dev, "enet_clk_ref", &ref_clk); > + if (ret >= 0) { > + ret = clk_enable(&ref_clk); > + if (ret < 0) { > + debug("Can't enable FEC ref clk: %d\n", ret); > + return ret; > + } > + } > + > + ret = clk_get_by_name(dev, "enet_2x_txclk", &clk_2x_txclk); > + if (ret >= 0) { > + ret = clk_enable(&clk_2x_txclk); > + if (ret < 0) { > + debug("Can't enable FEC 2x_tx clk: %d\n", ret); > + return ret; > + } > + } > + > priv->clk_rate = clk_get_rate(&priv->ipg_clk); > } > > @@ -1368,7 +1397,6 @@ static int fecmxc_probe(struct udevice *dev) > } > > fec_reg_setup(priv); > - > priv->dev_id = dev->seq; > #ifdef CONFIG_FEC_MXC_MDIO_BASE > bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq); > @@ -1492,6 +1520,7 @@ static const struct udevice_id fecmxc_ids[] = { > { .compatible = "fsl,imx53-fec" }, > { .compatible = "fsl,imx7d-fec" }, > { .compatible = "fsl,mvf600-fec" }, > + { .compatible = "fsl,imx8qm-fec" }, > { } > }; > > diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h > index e5f2dd7..23180a6 100644 > --- a/drivers/net/fec_mxc.h > +++ b/drivers/net/fec_mxc.h > @@ -264,6 +264,7 @@ struct fec_priv { > u32 interface; > #endif > struct clk ipg_clk; > + struct clk ahb_clk; > u32 clk_rate; > }; > > -- > 2.7.4 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index d7c0809..6d485f1 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -6,7 +6,6 @@ * (C) Copyright 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de> * (C) Copyright 2007 Pengutronix, Juergen Beisert <j.beisert@pengutronix.de> */ - #include <common.h> #include <dm.h> #include <environment.h> @@ -132,9 +131,9 @@ static int fec_get_clk_rate(void *udev, int idx) dev = udev; if (!dev) { - ret = uclass_get_device(UCLASS_ETH, idx, &dev); + ret = uclass_get_device_by_seq(UCLASS_ETH, idx, &dev); if (ret < 0) { - debug("Can't get FEC udev: %d\n", ret); + debug("Can't get FEC udev%d: %d\n", idx, ret); return ret; } } @@ -149,7 +148,7 @@ static int fec_get_clk_rate(void *udev, int idx) #endif } -static void fec_mii_setspeed(struct ethernet_regs *eth) +static void fec_mii_setspeed(struct ethernet_regs *eth, int idx) { /* * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock @@ -171,7 +170,7 @@ static void fec_mii_setspeed(struct ethernet_regs *eth) u32 hold; int ret; - ret = fec_get_clk_rate(NULL, 0); + ret = fec_get_clk_rate(NULL, idx); if (ret < 0) { printf("Can't find FEC0 clk rate: %d\n", ret); return; @@ -593,7 +592,7 @@ static int fec_init(struct eth_device *dev, bd_t *bd) fec_reg_setup(fec); if (fec->xcv_type != SEVENWIRE) - fec_mii_setspeed(fec->bus->priv); + fec_mii_setspeed(fec->bus->priv, fec->dev_id); /* Set Opcode/Pause Duration Register */ writel(0x00010020, &fec->eth->op_pause); /* FIXME 0xffff0020; */ @@ -1073,7 +1072,7 @@ struct mii_dev *fec_get_miibus(ulong base_addr, int dev_id) free(bus); return NULL; } - fec_mii_setspeed(eth); + fec_mii_setspeed(eth, dev_id); return bus; } @@ -1142,7 +1141,7 @@ static int fec_probe(bd_t *bd, int dev_id, uint32_t base_addr, fec_set_dev_name(edev->name, dev_id); fec->dev_id = (dev_id == -1) ? 0 : dev_id; fec->bus = bus; - fec_mii_setspeed(bus->priv); + fec_mii_setspeed(bus->priv, fec->dev_id); #ifdef CONFIG_PHYLIB fec->phydev = phydev; phy_connect_dev(phydev, edev); @@ -1324,6 +1323,7 @@ static int fecmxc_probe(struct udevice *dev) int ret; if (IS_ENABLED(CONFIG_IMX8)) { + struct clk ref_clk, clk_2x_txclk; ret = clk_get_by_name(dev, "ipg", &priv->ipg_clk); if (ret < 0) { debug("Can't get FEC ipg clk: %d\n", ret); @@ -1335,6 +1335,35 @@ static int fecmxc_probe(struct udevice *dev) return ret; } + ret = clk_get_by_name(dev, "ahb", &priv->ahb_clk); + if (ret < 0) { + debug("Can't get FEC ahb clk: %d\n", ret); + return ret; + } + ret = clk_enable(&priv->ahb_clk); + if (ret < 0) { + debug("Can't enable FEC ahb clk: %d\n", ret); + return ret; + } + + ret = clk_get_by_name(dev, "enet_clk_ref", &ref_clk); + if (ret >= 0) { + ret = clk_enable(&ref_clk); + if (ret < 0) { + debug("Can't enable FEC ref clk: %d\n", ret); + return ret; + } + } + + ret = clk_get_by_name(dev, "enet_2x_txclk", &clk_2x_txclk); + if (ret >= 0) { + ret = clk_enable(&clk_2x_txclk); + if (ret < 0) { + debug("Can't enable FEC 2x_tx clk: %d\n", ret); + return ret; + } + } + priv->clk_rate = clk_get_rate(&priv->ipg_clk); } @@ -1368,7 +1397,6 @@ static int fecmxc_probe(struct udevice *dev) } fec_reg_setup(priv); - priv->dev_id = dev->seq; #ifdef CONFIG_FEC_MXC_MDIO_BASE bus = fec_get_miibus((ulong)CONFIG_FEC_MXC_MDIO_BASE, dev->seq); @@ -1492,6 +1520,7 @@ static const struct udevice_id fecmxc_ids[] = { { .compatible = "fsl,imx53-fec" }, { .compatible = "fsl,imx7d-fec" }, { .compatible = "fsl,mvf600-fec" }, + { .compatible = "fsl,imx8qm-fec" }, { } }; diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index e5f2dd7..23180a6 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -264,6 +264,7 @@ struct fec_priv { u32 interface; #endif struct clk ipg_clk; + struct clk ahb_clk; u32 clk_rate; };
Add support for more clocks used by iMX8 from DTB: ref_clock, tx_2x_clock, ahb_clock And update get clock rate interface to support multiple fec ports. Signed-off-by: Ye Li <ye.li@nxp.com> --- Changes in v2: - None drivers/net/fec_mxc.c | 47 ++++++++++++++++++++++++++++++++++++++--------- drivers/net/fec_mxc.h | 1 + 2 files changed, 39 insertions(+), 9 deletions(-)