Patchwork [U-Boot,v2,1/5] coldfire: Change timer_init return type from void to int

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Submitter y@theia.denx.de
Date Aug. 31, 2011, 12:09 p.m.
Message ID <1314792557-9021-1-git-send-email-y>
Download mbox | patch
Permalink /patch/112545/
State Superseded
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y@theia.denx.de - Aug. 31, 2011, 12:09 p.m.
From: Stany MARCEL <stany.marcel@novasys-ingenierie.com>

timer_init protorype change for uniformization with other architectures

Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>
---
Changes for v2:
   - Remove extern of timer_init

 arch/m68k/cpu/mcf547x_8x/slicetimer.c |    4 +++-
 arch/m68k/lib/board.c                 |    2 --
 arch/m68k/lib/time.c                  |    8 ++++++--
 3 files changed, 9 insertions(+), 5 deletions(-)

--
1.7.1

Patch

diff --git a/arch/m68k/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
index 467a807..ee96aad 100644
--- a/arch/m68k/cpu/mcf547x_8x/slicetimer.c
+++ b/arch/m68k/cpu/mcf547x_8x/slicetimer.c
@@ -72,7 +72,7 @@  void dtimer_interrupt(void *not_used)
 	}
 }

-void timer_init(void)
+int timer_init(void)
 {
 	volatile slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE);

@@ -93,6 +93,8 @@  void timer_init(void)
 	/* set a period of 1us, set timer mode to restart and
 	   enable timer and interrupt */
 	timerp->cr = SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN;
+
+	return 0;
 }

 ulong get_timer(ulong base)
diff --git a/arch/m68k/lib/board.c b/arch/m68k/lib/board.c
index 945ab66..1df50f1 100644
--- a/arch/m68k/lib/board.c
+++ b/arch/m68k/lib/board.c
@@ -78,8 +78,6 @@  static char *failed = "*** failed ***\n";
 extern ulong __init_end;
 extern ulong __bss_end__;

-extern	void timer_init(void);
-
 #if defined(CONFIG_WATCHDOG)
 # define INIT_FUNC_WATCHDOG_INIT	watchdog_init,
 # define WATCHDOG_DISABLE		watchdog_disable
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index a316cdf..a1eb983 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -91,7 +91,7 @@  void dtimer_interrupt(void *not_used)
 	}
 }

-void timer_init(void)
+int timer_init(void)
 {
 	volatile dtmr_t *timerp = (dtmr_t *) (CONFIG_SYS_TMR_BASE);

@@ -114,6 +114,8 @@  void timer_init(void)
 	/* set a period of 1us, set timer mode to restart and enable timer and interrupt */
 	timerp->tmr = CONFIG_SYS_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
 	    DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
+
+	return 0;
 }

 ulong get_timer(ulong base)
@@ -153,7 +155,7 @@  void __udelay(unsigned long usec)
 	}
 }

-void timer_init(void)
+int timer_init(void)
 {
 	volatile pit_t *timerp = (pit_t *) (CONFIG_SYS_PIT_BASE);
 	timestamp = 0;
@@ -162,6 +164,8 @@  void timer_init(void)
 	timerp->pcsr = PIT_PCSR_OVW;
 	timerp->pmr = lastinc = 0;
 	timerp->pcsr |= PIT_PCSR_PRE(CONFIG_SYS_PIT_PRESCALE) | PIT_PCSR_EN;
+
+	return 0;
 }

 ulong get_timer(ulong base)