From patchwork Sat Jun 29 15:41:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vincent Chen X-Patchwork-Id: 1124799 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=sourceware.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=libc-alpha-return-103359-incoming=patchwork.ozlabs.org@sourceware.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.b="W3zF+gaX"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 45bdFF4wkrz9s4V for ; Sun, 30 Jun 2019 01:42:57 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-type; q=dns; s=default; b=rx1sk SxNGudj0g7F8KZZjI27UXCfEn4Wwmvfujs+BrS6cl46SnV6MBHzKEkAFYxYpJKEx aT5HJ5GFrJN7otAoA6TqrGh/wFQf5npG7zIbDWzRdVbfBwy6husf2lfLi+fmpgIV M+0HmHl/Rx/s53+BYIvsa/+eFKoDp6vU2/Lh2s= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-type; s=default; bh=2OOiBKXqioi dsw6IpE4nJrvRvrI=; b=W3zF+gaXLMOJ5o0nYfFnu7CYP1OJ3z/W6LGdM6xz4OO kmpPJMdUxrIqMHSdga06/5rXPV+XZv9smTKxe0GJO6Y5VqOzdiN+E9muwgmOlLrc xNq6ayS7k/miyvlcjWNKkQaV6n0sFwdlOyJxkLRbTVS8sqi3qaFgbbxMS3lm27CU = Received: (qmail 98134 invoked by alias); 29 Jun 2019 15:42:21 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 98068 invoked by uid 89); 29 Jun 2019 15:42:20 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-22.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_SHORT, RDNS_DYNAMIC, SPF_PASS, TVD_RCVD_IP autolearn=ham version=3.3.1 spammy=representing, clog X-HELO: ATCSQR.andestech.com From: Vincent Chen To: , CC: , , Vincent Chen Subject: [PATCH v6 05/11] nds32: Generic , soft-fp Routines Date: Sat, 29 Jun 2019 23:41:24 +0800 Message-ID: <1561822890-23219-6-git-send-email-vincentc@andestech.com> In-Reply-To: <1561822890-23219-1-git-send-email-vincentc@andestech.com> References: <1561822890-23219-1-git-send-email-vincentc@andestech.com> MIME-Version: 1.0 X-DNSRBL: X-MAIL: ATCSQR.andestech.com x5TFY3ie032363 nds32 ports only support soft-fp operation. This patch contains the requried files and ulps file. 2019-06-29 Vincent Chen 2019-06-29 CheWei Chuang * sysdeps/nds32/bits/fenv.h: New file. * sysdeps/nds32/nofpu/libm-test-ulps: Likewise. * sysdeps/nds32/nofpu/libm-test-ulps-name: Likewise. * sysdeps/nds32/sfp-machine.h: Likewise. * sysdeps/nds32/tininess.h: Likewise. --- sysdeps/nds32/bits/fenv.h | 51 +++++ sysdeps/nds32/nofpu/libm-test-ulps | 390 ++++++++++++++++++++++++++++++++ sysdeps/nds32/nofpu/libm-test-ulps-name | 1 + sysdeps/nds32/sfp-machine.h | 70 ++++++ sysdeps/nds32/tininess.h | 1 + 5 files changed, 513 insertions(+) create mode 100644 sysdeps/nds32/bits/fenv.h create mode 100644 sysdeps/nds32/nofpu/libm-test-ulps create mode 100644 sysdeps/nds32/nofpu/libm-test-ulps-name create mode 100644 sysdeps/nds32/sfp-machine.h create mode 100644 sysdeps/nds32/tininess.h diff --git a/sysdeps/nds32/bits/fenv.h b/sysdeps/nds32/bits/fenv.h new file mode 100644 index 0000000..4f84c19 --- /dev/null +++ b/sysdeps/nds32/bits/fenv.h @@ -0,0 +1,51 @@ +/* Floating point environment, Andes nds32 version. + Copyright (C) 2018-2019 Free Software Foundation, Inc. + This file is part of the GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#ifndef _FENV_H +# error "Never use directly; include instead." +#endif + +#define FE_ALL_EXCEPT 0 + +enum + { + __FE_UNDEFINED = 0, + + FE_TONEAREST = +#define FE_TONEAREST 1 + FE_TONEAREST, + }; + + +/* Type representing exception flags. */ +typedef unsigned int fexcept_t; + +/* Type representing floating-point environment. */ +typedef unsigned int fenv_t; + +/* If the default argument is used we use this value. */ +#define FE_DFL_ENV ((const fenv_t *) -1) + + +#if __GLIBC_USE (IEC_60559_BFP_EXT) +/* Type representing floating-point control modes. */ +typedef unsigned int femode_t; + +/* Default floating-point control modes. */ +# define FE_DFL_MODE ((const femode_t *) -1L) +#endif diff --git a/sysdeps/nds32/nofpu/libm-test-ulps b/sysdeps/nds32/nofpu/libm-test-ulps new file mode 100644 index 0000000..d753dbe --- /dev/null +++ b/sysdeps/nds32/nofpu/libm-test-ulps @@ -0,0 +1,390 @@ +# Begin of automatic generation + +# Maximal error of functions: +Function: "acos": +float: 1 +ifloat: 1 + +Function: "acosh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "asin": +float: 1 +ifloat: 1 + +Function: "asinh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "atan": +float: 1 +ifloat: 1 + +Function: "atan2": +float: 1 +ifloat: 1 + +Function: "atanh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "cabs": +double: 1 +idouble: 1 + +Function: Real part of "cacos": +double: 1 +float: 2 +idouble: 1 +ifloat: 2 + +Function: Imaginary part of "cacos": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Real part of "cacosh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Imaginary part of "cacosh": +double: 1 +float: 2 +idouble: 1 +ifloat: 2 + +Function: "carg": +float: 1 +ifloat: 1 + +Function: Real part of "casin": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "casin": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Real part of "casinh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Imaginary part of "casinh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "catan": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "catan": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "catanh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "catanh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "cbrt": +double: 3 +float: 1 +idouble: 3 +ifloat: 1 + +Function: Real part of "ccos": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "ccos": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "ccosh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "ccosh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "cexp": +double: 2 +float: 1 +idouble: 2 +ifloat: 1 + +Function: Imaginary part of "cexp": +double: 1 +float: 2 +idouble: 1 +ifloat: 2 + +Function: Real part of "clog": +double: 3 +float: 3 +idouble: 3 +ifloat: 3 + +Function: Imaginary part of "clog": +float: 1 +ifloat: 1 + +Function: Real part of "clog10": +double: 3 +float: 4 +idouble: 4 +ifloat: 4 + +Function: Imaginary part of "clog10": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "cos": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "cosh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "cpow": +double: 2 +float: 5 +idouble: 2 +ifloat: 5 + +Function: Imaginary part of "cpow": +float: 2 +ifloat: 2 + +Function: Real part of "csin": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "csinh": +float: 1 +ifloat: 1 + +Function: Imaginary part of "csinh": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Real part of "csqrt": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Imaginary part of "csqrt": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Real part of "ctan": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: Imaginary part of "ctan": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Real part of "ctanh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: Imaginary part of "ctanh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "erf": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "erfc": +double: 3 +float: 2 +idouble: 3 +ifloat: 2 + +Function: "exp10": +double: 2 +idouble: 2 + +Function: "exp2": +double: 1 +idouble: 1 + +Function: "expm1": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "gamma": +double: 4 +float: 3 +idouble: 4 +ifloat: 3 + +Function: "hypot": +double: 1 +idouble: 1 + +Function: "j0": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "j1": +double: 1 +float: 2 +idouble: 1 +ifloat: 2 + +Function: "jn": +double: 4 +float: 4 +idouble: 4 +ifloat: 4 + +Function: "lgamma": +double: 4 +float: 3 +idouble: 4 +ifloat: 3 + +Function: "log10": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "log1p": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "log2": +double: 2 +float: 1 +idouble: 2 +ifloat: 1 + +Function: "pow": +double: 1 +idouble: 1 + +Function: "sin": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "sincos": +double: 1 +float: 1 +idouble: 1 +ifloat: 1 + +Function: "sinh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "tan": +float: 1 +ifloat: 1 + +Function: "tanh": +double: 2 +float: 2 +idouble: 2 +ifloat: 2 + +Function: "tgamma": +double: 5 +float: 4 +idouble: 5 +ifloat: 4 + +Function: "y0": +double: 2 +float: 1 +idouble: 2 +ifloat: 1 + +Function: "y1": +double: 3 +float: 2 +idouble: 3 +ifloat: 2 + +Function: "yn": +double: 3 +float: 3 +idouble: 3 +ifloat: 3 + +# end of automatic generation diff --git a/sysdeps/nds32/nofpu/libm-test-ulps-name b/sysdeps/nds32/nofpu/libm-test-ulps-name new file mode 100644 index 0000000..e136775 --- /dev/null +++ b/sysdeps/nds32/nofpu/libm-test-ulps-name @@ -0,0 +1 @@ +nds32 soft-fp diff --git a/sysdeps/nds32/sfp-machine.h b/sysdeps/nds32/sfp-machine.h new file mode 100644 index 0000000..d36f2dd --- /dev/null +++ b/sysdeps/nds32/sfp-machine.h @@ -0,0 +1,70 @@ +/* Andes nds32 softfloat definitions + Copyright (C) 2018-2019 Free Software Foundation, Inc. + This file is part of GNU C Library. + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library. If not, see + . */ + +#define _FP_W_TYPE_SIZE 32 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R, X, Y) \ + _FP_MUL_MEAT_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +#define _FP_MUL_MEAT_D(R, X, Y) \ + _FP_MUL_MEAT_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +#define _FP_MUL_MEAT_Q(R, X, Y) \ + _FP_MUL_MEAT_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +#define _FP_MUL_MEAT_DW_S(R, X, Y) \ + _FP_MUL_MEAT_DW_1_wide (_FP_WFRACBITS_S, R, X, Y, umul_ppmm) +#define _FP_MUL_MEAT_DW_D(R, X, Y) \ + _FP_MUL_MEAT_DW_2_wide (_FP_WFRACBITS_D, R, X, Y, umul_ppmm) +#define _FP_MUL_MEAT_DW_Q(R, X, Y) \ + _FP_MUL_MEAT_DW_4_wide (_FP_WFRACBITS_Q, R, X, Y, umul_ppmm) + +#define _FP_DIV_MEAT_S(R, X, Y) _FP_DIV_MEAT_1_loop (S, R, X, Y) +#define _FP_DIV_MEAT_D(R, X, Y) _FP_DIV_MEAT_2_udiv (D, R, X, Y) +#define _FP_DIV_MEAT_Q(R, X, Y) _FP_DIV_MEAT_4_udiv (Q, R, X, Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 +#define _FP_QNANNEGATEDP 0 + +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do \ + { \ + if ((_FP_FRAC_HIGH_RAW_##fs (X) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs (Y) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc (R, Y); \ + } \ + else \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc (R, X); \ + } \ + R##_c = FP_CLS_NAN; \ + } \ + while (0) + +#define _FP_TININESS_AFTER_ROUNDING 1 diff --git a/sysdeps/nds32/tininess.h b/sysdeps/nds32/tininess.h new file mode 100644 index 0000000..1db3779 --- /dev/null +++ b/sysdeps/nds32/tininess.h @@ -0,0 +1 @@ +#define TININESS_AFTER_ROUNDING 1